On Mon, Oct 07, 2002 at 02:51:36PM -0400, Daniel Jacobowitz wrote: > On Mon, Oct 07, 2002 at 08:43:44PM +0200, Johannes Stezenbach wrote: > > The question is how the glibc can detect if > > a) the CPU does not have LL/SC > > b) the kernel guarantees k1 != MAGIC > > You should be using an "aux vector"; see how PowerPC provides current > glibc with the size of a cache line. It took me a while to figure out how aux vectors work. It seems to me that MIPS does not use the hardware capabilities field of the aux vector at all. TO use it, one would have to - add a field to struct cpuinfo_mips in include/asm-mips/processor.h, and set it in arch/mips/kernel/setup.c after CPU probing; - define ELF_HWCAP in include/asm-mips/elf.h to return something useful from the new cpuinfo_mips field Or, to just use it to signal "use beql k1, MAGIC instead of LL/SC", one could just define ELF_HWCAP dependent on kernel-Config. Anyway, we would have to document the meaning of the HWCAP bits as part of the kernel ABI. i386 uses this, as you can see by running e.g. $ LD_SHOW_AUXV=1 ls provided you have glibc-2.2.5. glibc/sysdeps/generic/dl-sysdep.c then reads it into dl_hwcap, and it's up to platform specific code to use it. Regards, Johannes
