On Sun, Jul 14, 2002 at 11:17:39PM +0200, Vivien Chappelier wrote:
> @@ -111,13 +115,96 @@
> }
> }
>
> +static void
> +andes_flush_cache_all(void)
> +{
> + andes_flush_cache_l1();
> + andes_flush_cache_l2();
> +}
We can optimize that slightly. By leaving it an empty function as it is :-)
> void
> andes_flush_icache_page(unsigned long page)
> {
> - if (scache_lsz64)
> - blast_scache64_page(page);
> - else
> - blast_scache128_page(page);
> + switch (sc_lsize) {
> + case 64:
> + blast_scache64_page(page);
> + break;
> + case 128:
> + blast_scache128_page(page);
> + break;
Eh...
So this is replacing a wrong version with another wrong piece of code.
There simply is no reason to flush the second level cache at this point.
That forcing instructions to be re-fetched from memory and that's slooow.
> + _dma_cache_wback_inv = andes_dma_cache_wback_inv;
> + _dma_cache_wback = andes_dma_cache_wback;
> + _dma_cache_inv = andes_dma_cache_inv;
This is breaking cache coherent machines.
Encore une fois :-)
Ralf
