I have no preferences of the value of SHMLBA, as long as the define in /usr/include/sys/shm.c and include/asm-mips/shmparam.h are in sync. /Carsten Ralf Baechle wrote: > On Mon, Jul 08, 2002 at 10:31:23AM -0700, Jun Sun wrote: > > > I think this is also an effective way to avoid cache aliasing. > > Correct. At the same time the choice of this value also tends to cause > bad use of L2 caches ... > > > As long as your cache size is less than 256K, you don't get cache aliasing > > through shared memory. > > Actually the "alias set" has to be less than 256kB. On existing MIPS > implementations it's at most 16kB; a sillyness of the R4000 / R4400 VCE > exceptions makes a value of 32kB mandatory for poerformance reasons. > > > Perhaps other arches don't have cache aliasing? I know for sure i386 > > does not have that effect. > > The problem doesn't exist on physically indexed caches. Also on read-only > caches such as the instruction cache it usually can be ignored. So for > example the R2000, R3000, SB1 cores, RM7000, R4kc and R5kc in the right > configurations and the R10000 family don't suffer from aliases. Details > are messy :) > > Ralf
