On Wed, Feb 20, 2002 at 08:27:19AM +0000, Dominic Sweetman wrote: > It may be heretical... but the lazy FPU context switch was invented > for 16MHz CPUs using a write-through cache and non-burst memory, where > saving 16 x 64-bit registers took 6us or so (and quite a bit less, > later, to read them back). Call it 8us. We are still running on good ol Decstations *snief* Going the way to make it SMP only like others archs seem to do it would be good. Flo -- Florian Lohoff flo@rfc822.org +49-5201-669912 Nine nineth on september the 9th Welcome to the new billenium
Attachment:
pgp00149.pgp
Description: PGP signature
