On Mon, 4 Feb 2002, Zhang Fuxin wrote: > hi, > > Gcc (2.96 20000731,H.J.LU's rh port for mips) think 0x7fc00000 is QNaN and > optimize 0.0/0.0 as 0x7fc00000 for single precision ops,while for my cpu > (maybe most mips cpu) is a SNaN. R4k user's manual and "See Mips Run" both > say so.And experiments confirm this. MIPS interprets Signalling NaN's different than e.g. Intel. According to IEEE754 it _is_ a matter of interpretation. 0x7fc00000 is an SNaN while 0x7fbfffff is an QNaN. It would be great if you could fix it. /Kjeld > Should we correct it? > > > > >Regards > > Zhang Fuxin > > fxzhang@ict.ac.cn > > Regards > Zhang Fuxin > fxzhang@ict.ac.cn > -- _ _ ____ ___ Mailto:kjelde@mips.com |\ /|||___)(___ MIPS Denmark Direct: +45 44 86 55 85 | \/ ||| ____) Lautrupvang 4 B Switch: +45 44 86 55 55 TECHNOLOGIES DK-2750 Ballerup Fax...: +45 44 86 55 56 Denmark http://www.mips.com/