hi,all We have trouble debugging a little fpga cpu. It seems that accesses to non-existing ports differ from what IDT cpu shows. Is there any standards that specifys the behavior? We have below code segment to demonstrate this problem: /* this results in 60 for idtRC64474,0 for our cpu */ prom_printf("before write *1ee=%x\n",inb(0x1ee)); outb(0xa0,0x1ee); /* this print 0 for idt,a0 for our cpu */ prom_printf("immediately after write:*1ee=%x\n",inb(0x1ee)); prom_printf("\nLINUX starting...\n"); prom_init_cmdline(); prom_meminit(); /* both print 0xa */ prom_printf("long after first write:*1ee=%x\n",inb(0x1ee)); outb(0xb0,0x1ee); /* idt print 0,ours b0 */ prom_printf("imme. after second write:*1ee=%x\n",inb(0x1ee)); inb(0x21); prom_printf("init done.\n"); /* both a */ prom_printf("long after second write:*1ee=%x\n",inb(0x1ee)); This hit us when linux probing ide drives: it writes to 0x1ee etc ports that doesn't exist there. Our cpu read back the exact value it writes to the port so it think the drive is there and makes unnecessary probing. And some other weird problems too. I haven't notice a clear statement for behaviors under such condition. Would you please help me out? Thank you in advance. Regards Zhang Fuxin fxzhang@ict.ac.cn