The current MIPS_ATOMIC set code for no-LLSC case does a load and store with interrupt open. This is potentially dangerous as an interrupt could happen in-between and cause the value changed inside the interrupt handler. Therefore the load/store is not atomic anymore. Does the following patch look good to fix that? http://linux.junsun.net/patches/oss.sgi.com/submitted/020110.disable-intr-for-nollsc-atomic-set.patch Jun
