> or less) can handle much larger memories - we would like it to go on > past 4Gbytes. So now there aren't enough addresses on PCI to map all > the memory. Good PCI devices can support DAC and can access 64bits on a 32bit bus at a tiny penalty. > We (more specifically Chris) have looked at the kernel sources, and > concluded that schemes of both types have been attempted - though the > sources don't, of course, pass judgement on how well it worked. > > Those of you with experience: which would you recommend? And if (2), > can you point us to descriptions of good hardware facilities you've > met or even imagined? On big X86 setups bounce buffers really do hurt I/O performance. The real answer is either DAC aware hardware for performance critical stuff or some kind of mapping hardware, which requires much more complex toys than a random cheap pci bridge. Alan
