Hi, The following patch adds a few macros for memory configuration for DECstation 5000/2x0 systems. Please apply. Maciej -- + Maciej W. Rozycki, Technical University of Gdansk, Poland + +--------------------------------------------------------------+ + e-mail: macro@ds2.pg.gda.pl, PGP key available + patch-mips-2.4.5-20010704-dec_memory-0 diff -up --recursive --new-file linux-mips-2.4.5-20010704.macro/include/asm-mips/dec/kn02.h linux-mips-2.4.5-20010704/include/asm-mips/dec/kn02.h --- linux-mips-2.4.5-20010704.macro/include/asm-mips/dec/kn02.h Wed Jun 27 22:35:33 2001 +++ linux-mips-2.4.5-20010704/include/asm-mips/dec/kn02.h Sun Aug 12 01:26:09 2001 @@ -28,6 +28,8 @@ #define KN02_RTC_BASE KSEG1ADDR(0x1fe80000) #define KN02_DZ11_BASE KSEG1ADDR(0x1fe00000) +#define KN02_CSR_BNK32M (1<<10) /* 32M stride */ + /* * Interrupt enable Bits */ diff -up --recursive --new-file linux-mips-2.4.5-20010704.macro/include/asm-mips/dec/kn03.h linux-mips-2.4.5-20010704/include/asm-mips/dec/kn03.h --- linux-mips-2.4.5-20010704.macro/include/asm-mips/dec/kn03.h Wed Jun 27 22:35:33 2001 +++ linux-mips-2.4.5-20010704/include/asm-mips/dec/kn03.h Sun Aug 12 01:23:20 2001 @@ -24,6 +24,10 @@ */ #define KN03_IOASIC_BASE KSEG1ADDR(0x1f840000) /* I/O ASIC */ #define KN03_RTC_BASE KSEG1ADDR(0x1fa00000) /* RTC */ +#define KN03_MCR_BASE KSEG1ADDR(0x1fac0000) /* MCR */ + +#define KN03_MCR_BNK32M (1<<10) /* 32M stride */ +#define KN03_MCR_ECCEN (1<<13) /* ECC enabled */ #define KN03_IOASIC_REG(r) (KN03_IOASIC_BASE+(r))
