On Tue, 24 Jul 2001, Andrew Thornton wrote: > >Using `atydebug' (from tools in CVS module atyfb at > >http://www.sourceforge.net/projects/linux-fbdev/), the PLL debug values > mean: > > > >| tux$ ./atydebug ac ac 24 df f6 04 00 fd 8e 9e 65 05 00 00 00 00 > >| PLL rate = 417.901480 MHz (guessed) > >| bad MCLK post divider 5 > >| VCLK0 = 414.623821 MHz > >| VCLK1 = 232.713765 MHz > >| VCLK2 = 86.311678 MHz > >| VCLK3 = 165.521763 MHz > >| tux$ > > > >Which looks a bit odd. The same for the 512 K SGRAM. > > > >So I guess the Malta firmware hasn't initialized the RAGE XL yet. And atyfb > >requires an initialized chip. > > I guess this is not surprising because the Malta firmware isn't a PC BIOS. If the RAGE XL is the officially supported video board for the Malta, I wouldn't have been surprised if its firmware would have contained code to initialize the RAGE XL. But unfortunately this doesn't seem to be the case. Next question: is there sample code available (e.g. with the `supported' OS for the Malta) to initialize the RAGE XL? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven ------------- Sony Software Development Center Europe (SDCE) Geert.Uytterhoeven@sonycom.com ------------------- Sint-Stevens-Woluwestraat 55 Voice +32-2-7248626 Fax +32-2-7262686 ---------------- B-1130 Brussels, Belgium
