oops sorry i meant to mention that. running a mips 4kc. "Kevin D. Kissell" wrote: > > What processor are you running? > > Kevin K. > > ----- Original Message ----- > From: "Ian Thompson" <iant@palmchip.com> > To: <linux-mips@oss.sgi.com> > Sent: Monday, June 04, 2001 7:34 PM > Subject: dcache_blast() bug? > > > > > Hi all, > > > > I'm seeing some odd memory behavior around the time when blast_dcache() > > is called, leading me to think that the method may be a little buggy. > > It appears that memory is being corrupted (consistently so) over the > > course of flushing the dcache. This happens to my command line argument > > string - arcs_cmdline. Before the blast_dcache() call, it is > > "console=ttyS0 ramdisk_start=0x9fcf0000 load_ramdisk=1", and after the > > call, the corrupted data is "ttyS0 ra0". I take it this isn't supposed > > to happen? any ideas of why the writeback_invalidate_d cache operation > > may be losing data? > > > > thanks, > > -ian > > > > > > -- > > ---------------------------------------- > > Ian Thompson tel: 408.952.2023 > > Firmware Engineer fax: 408.570.0910 > > Palmchip Corporation www.palmchip.com -- ---------------------------------------- Ian Thompson tel: 408.952.2023 Firmware Engineer fax: 408.570.0910 Palmchip Corporation www.palmchip.com
