"Kevin D. Kissell" wrote: > > (Software cache coherency) It is possible, > but tricky, and at times unavoidably inefficient to build a > software-coherent SMP system. I have not heard of anyone > doing so with MIPS/Linux. > How would it be possible? Any reference to the previous implementations? I imagine you would need at least some kind of atomic operation (like ll/sc) working reliably (which itself may require cache coherency). Also, any such scheme should not require massive change in the programming. I am very curious.... Jun
