The FPU emulator doesn't work properly

[Carsten Langgaard <carstenl@mips.com>]

I think I have send this patch before, but it hasn't got in to the
archive, apparently.
This is needed in order to get the FPU emulator work properly.


Index: arch/mips/kernel/branch.c
===================================================================
RCS file: /home/repository/sw/linux-2.4.0/arch/mips/kernel/branch.c,v
retrieving revision 1.3
diff -u -r1.3 branch.c
--- branch.c    2000/12/05 13:46:12     1.3
+++ branch.c    2001/02/06 15:46:53
@@ -69,7 +69,7 @@
                switch (insn.i_format.rt) {
                case bltz_op:
                case bltzl_op:
-                       if (regs->regs[insn.i_format.rs] < 0)
+                       if ((long)regs->regs[insn.i_format.rs] < 0)
                                epc = epc + 4 +
(insn.i_format.simmediate << 2);
                        else
                                epc += 8;
@@ -78,7 +78,7 @@

                case bgez_op:
                case bgezl_op:
-                       if (regs->regs[insn.i_format.rs] >= 0)
+                       if ((long)regs->regs[insn.i_format.rs] >= 0)
                                epc = epc + 4 +
(insn.i_format.simmediate << 2);
                        else
                                epc += 8;
@@ -88,7 +88,7 @@
                case bltzal_op:
                case bltzall_op:
                        regs->regs[31] = epc + 8;
-                       if (regs->regs[insn.i_format.rs] < 0)
+                       if ((long)regs->regs[insn.i_format.rs] < 0)
                                epc = epc + 4 +
(insn.i_format.simmediate << 2);
                        else
                                epc += 8;
@@ -98,7 +98,7 @@
                case bgezal_op:
                case bgezall_op:
                        regs->regs[31] = epc + 8;
-                       if (regs->regs[insn.i_format.rs] >= 0)
+                       if ((long)regs->regs[insn.i_format.rs] >= 0)
                                epc = epc + 4 +
(insn.i_format.simmediate << 2);
                        else
                                epc += 8;
@@ -146,7 +146,7 @@
        case blez_op: /* not really i_format */
        case blezl_op:
                /* rt field assumed to be zero */
-               if (regs->regs[insn.i_format.rs] <= 0)
+               if ((long)regs->regs[insn.i_format.rs] <= 0)
                        epc = epc + 4 + (insn.i_format.simmediate << 2);

                else
                        epc += 8;
@@ -156,7 +156,7 @@
        case bgtz_op:
        case bgtzl_op:
                /* rt field assumed to be zero */
-               if (regs->regs[insn.i_format.rs] > 0)
+               if ((long)regs->regs[insn.i_format.rs] > 0)
                        epc = epc + 4 + (insn.i_format.simmediate << 2);

                else
                        epc += 8;


--
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