[...]
> > + /*
> > + * Algorithm for reading ADC, per SMM665 datasheet
> > + *
> > + * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]}
> > + * [wait 70 uS]
> > + * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]}
> > + *
> > + * To implement the first part of this exchange,
> > + * do a full read transaction and expect a failure/Nack.
> > + * This sets up the address pointer on the SMM665
> > + * and starts the ADC conversion.
> > + * Then do a two-byte read transaction.
> > + */
> Is there no better way of handling this? There are protocol mangling hacks
> to tell the i2c core to ignore a NAKs under some circumstances.
>
> > + rv = i2c_smbus_read_byte_data(client, adc << 3);
> > + if (rv >= 0) {
> > + /* No error, something is wrong. Retry. */
> > + rv = -1;
> > + continue;
> > + }
I looked through the core i2c code, but did not find anything I can
use.
Problem is that per smm665 specification, the first NACK is expected. So
we do not just want to ignore this NACK, we want to actively check if
the command "failed" as expected, and report an error if it did _not_
fail.
Guenter
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