Fwd: ls_sensors, fscscy.o & watchdog

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* Jean Delvare <khali at linux-fr.org> [2003-06-03 20:20:32 +0200]:

> > > Do you mean that the 6th bit has no effect, or that setting it to 1
> > > disables the watchdog?
> > 5th, not 6th
> 
> 6th, I insist. Bit number 5 is the 6th bit. You usually start numbering
> with 0, but the "zeroth bit" makes no sense to me (although the word do
> exist). Or maybe is it just me? Let's call it the bit accounting for 32
> :)

A pedantic note: this is still ambiguous, depending on convention.  E.g.
Motorola's MPC500 RCPU manual labels the MSb as 0, instead of the more
common LSb 0 (of Intel, and even other Motorola like 68k).  I think
I've heard MSb 0 called "IBM ordering".

Also, this difference is unrelated to endianness.  To change bit-numbering
schemes has no effect on the code you write... it only affects the comments.
It's more likely to screw up hardware designers though. :)

Regards,

-- 
Mark M. Hoffman
mhoffman at lightlink.com



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