i2c-algo-bit timing

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First, included gzipped patch against latest CVS, it's my current local
work I told I would not commit before release and round for comments.

On Sun, 1 Dec 2002, Mark D. Studebaker wrote:

> // The following call to sclhi() contains a call to delay(adap->udelay)
> // which ensures the clock high time
> 		if (sclhi(adap)<0) { /* timed out */
> 			sdahi(adap); /* we don't want to block the net */
> 			DEB2(printk(KERN_DEBUG " i2c_outb: 0x%02x, timeout at bi
> 			return -ETIMEDOUT;
> 		};

Unfortunately sclhi() does not ensure clock high time the right way.
The delay should be after we read clock as high.

Usually this means we get no acknowledge from the client, since it has
missed this one clock cycle. If we miss a bit during the address bits,
we may access incorrect chips or more than one chip at a time.

-- 
  Ky?sti M?lkki
  kmalkki at cc.hut.fi
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