On 11/24/2016 11:56 AM, AKASHI Takahiro wrote:
> Hi,
>
> I'm trying to give it a spin on arm64, but ...
Thanks for trying this.
>> +/*
>> + * Update a single kernel page table entry
>> + */
>> +static inline void set_kpte(struct page *page, unsigned long kaddr,
>> + pgprot_t prot) {
>> + unsigned int level;
>> + pte_t *kpte = lookup_address(kaddr, &level);
>> +
>> + /* We only support 4k pages for now */
>> + BUG_ON(!kpte || level != PG_LEVEL_4K);
>> +
>> + set_pte_atomic(kpte, pfn_pte(page_to_pfn(page), canon_pgprot(prot)));
>> +}
>
> As lookup_address() and set_pte_atomic() (and PG_LEVEL_4K), are arch-specific,
> would it be better to put the whole definition into arch-specific part?
Well yes but I haven't really looked into splitting up the arch specific stuff.
>> + /*
>> + * Map the page back into the kernel if it was previously
>> + * allocated to user space.
>> + */
>> + if (test_and_clear_bit(PAGE_EXT_XPFO_UNMAPPED,
>> + &page_ext->flags)) {
>> + kaddr = (unsigned long)page_address(page + i);
>> + set_kpte(page + i, kaddr, __pgprot(__PAGE_KERNEL));
>
> Why not PAGE_KERNEL?
Good catch, thanks!
>> + /*
>> + * The page is to be allocated back to user space, so unmap it from the
>> + * kernel, flush the TLB and tag it as a user page.
>> + */
>> + if (atomic_dec_return(&page_ext->mapcount) == 0) {
>> + BUG_ON(test_bit(PAGE_EXT_XPFO_UNMAPPED, &page_ext->flags));
>> + set_bit(PAGE_EXT_XPFO_UNMAPPED, &page_ext->flags);
>> + set_kpte(page, (unsigned long)kaddr, __pgprot(0));
>> + __flush_tlb_one((unsigned long)kaddr);
>
> Again __flush_tlb_one() is x86-specific.
> flush_tlb_kernel_range() instead?
I'll take a look. If you can tell me what the relevant arm64 equivalents are for the arch-specific
functions, that would help tremendously.
Thanks for the comments!
...Juerg
> Thanks,
> -Takahiro AKASHI
--
Juerg Haefliger
Hewlett Packard Enterprise
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