Re: [PATCH v2 3/3] mrf24j40: apply the security-enabled bit on secured outbound frames

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Hello.

Added Alan Ott in CC.

regards
Stefan Schmidt

On 14/03/16 21:46, Alexandre Macabies wrote:
We set the TXNSECEN bit of register TXNCON to on when transmitting a
security-enabled frame, as described in section 3.12.2 of the MRF
datasheet.

Signed-off-by: Alexander Aring <aar@xxxxxxxxxxxxxx>
Signed-off-by: Alexandre Macabies <web+oss@xxxxxxxxxxx>
Reviewed-by: Stefan Schmidt <stefan@xxxxxxxxxxxxxxx>
---
  drivers/net/ieee802154/mrf24j40.c | 4 ++++
  1 file changed, 4 insertions(+)

diff --git a/drivers/net/ieee802154/mrf24j40.c b/drivers/net/ieee802154/mrf24j40.c
index adc67be..f446db8 100644
--- a/drivers/net/ieee802154/mrf24j40.c
+++ b/drivers/net/ieee802154/mrf24j40.c
@@ -61,6 +61,7 @@
  #define REG_TXBCON0	0x1A
  #define REG_TXNCON	0x1B  /* Transmit Normal FIFO Control */
  #define BIT_TXNTRIG	BIT(0)
+#define BIT_TXNSECEN	BIT(1)
  #define BIT_TXNACKREQ	BIT(2)
#define REG_TXG1CON 0x1C
@@ -551,6 +552,9 @@ static void write_tx_buf_complete(void *context)
  	u8 val = BIT_TXNTRIG;
  	int ret;
+ if (ieee802154_is_secen(fc))
+		val |= BIT_TXNSECEN;
+
  	if (ieee802154_is_ackreq(fc))
  		val |= BIT_TXNACKREQ;

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