Hi Johannes
Johannes Berg schrieb:
> On Fri, 2012-07-27 at 18:00 +0200, Thomas Huehn wrote:
>
>> * &struct ieee80211_tx_info contains an array of these structs
>> - * in the control information, and it will be filled by the rate
>> - * control algorithm according to what should be sent. For example,
>> - * if this array contains, in the format { <idx>, <count> } the
>> + * in the control information, and it will be filled by the joint rate-
>> + * power control algorithm according to what should be sent. For example,
>> + * if this array contains, in the format { <idx>, <count>, <tpc> } the
>> * information
>> - * { 3, 2 }, { 2, 2 }, { 1, 4 }, { -1, 0 }, { -1, 0 }
>> + * { 3, 2, 16 }, { 2, 2, 10 }, { 1, 4, 5 }, { -1, 0, 0 }
>> * then this means that the frame should be transmitted
>> - * up to twice at rate 3, up to twice at rate 2, and up to four
>> - * times at rate 1 if it doesn't get acknowledged. Say it gets
>> - * acknowledged by the peer after the fifth attempt, the status
>> + * up to twice at rate 3 with 16 dBm, up to twice at rate 2 with 10 dBm,
>
> You might want to consider using 1/2 or 1/4 dBm granularity? A lot of
> hardware can do that.
>
The choice of 1 dBm as step width was based on our experiments with
Atheros chips that do support up to 0,5dBm step width. We concluded that
1dBm is sufficient as it provides 20 steps from 1 till 100 mWatt as
dynamic range of control. But there is no problem for my tpc algorithm
to handle a granularity of 0.5 dBm as step size, or any other upcoming
tpc controller. Should we gather some feedback about todays hardware
specs in terms of tx_power abilities? Or should I just apply 0.5 dBm
steps in v2 ?
>> struct ieee80211_tx_rate {
>> s8 idx;
>> u8 count;
>> u8 flags;
>> + u8 tpc;
>
> I'm not sure that should be named "tpc". Think about what that means --
> "transmit power control", but it's really the power value, so it should
> be "txpower" or so.
>
I will change this to tx_power in v2, sounds reasonable.
Greetings Thomas
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