Hey Shafi, we had this checked out before, the EEPROM/EEP_ANT_DIV_CTL1 value is set to 000000c9, so bit 6 and 7 are on (as checked in this function). Cheers, Simon On Sat, Jul 07, 2012 at 04:02:12PM +0530, Mohammed Shafi wrote: > > further i check with the CCK/DETECT and MC_GAIN_CTRL in ar9485, it seems to be > > ar9003_hw_ant_ctrl_apply CCK_DETECT 80be6788 > > ar9003_hw_ant_ctrl_apply MC_GAIN_CTRLL 13ef0200 > > will check it out whats the one bit difference in CCK_DETECT > > also could you provide the output of the attached patch, i would just > check the diversity > configuration > > > -- > thanks, > shafi
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