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Re: [RFC][PATCH 10/10] bcm47xx: fix irq assignment for new SoCs.

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Hello.

On 06-06-2011 2:07, Hauke Mehrtens wrote:

Signed-off-by: Hauke Mehrtens<hauke@xxxxxxxxxx>
---
  arch/mips/bcm47xx/irq.c |    8 ++++++++
  1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c
index 325757a..3642cee 100644
--- a/arch/mips/bcm47xx/irq.c
+++ b/arch/mips/bcm47xx/irq.c
[...]
@@ -51,5 +52,12 @@ void plat_irq_dispatch(void)

  void __init arch_init_irq(void)
  {
+	if (bcm47xx_active_bus_type == BCM47XX_BUS_TYPE_BCMA) {
+		bcma_write32(bcm47xx_bus.bcma.drv_mips.core,
+			     BCMA_MIPS_MIPS74K_INTMASK(5), 1<<  31);
+		/* the kernel reads the timer irq from some register and thinks
+		 * it's #5, but we offset it by 2 and route to #7 */

   The preferred style for the multi-line comments is this:

/*
 * bla
 * bla
 */

WBR, Sergei
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