I spent few hours trying to understand/track ssb code and I'm giving up now. I can not understand basic code flow. We have some ssb_modinit, but I don't see it performing scanning bus at all. For some reason this function is aware of b43 bridge and gige driver. GigE driver doesn't seem to be module, while b43 seems to be. gige uses pci_device_id, while b43 uses ssb_device_id. I have no idea what b43 PCI bridge is. Flow seems to be ugly, at ssb_modinit we call ssb_gige_init which calls out ssb_driver_register. There is some magic "ssb_attach_queued_buses", which sounds like SSB (which is bus) attaching... buses. I wanted to at least understand when scanning of cores is done. I found "ssb_bus_scan", it is called from "ssb_bus_register". This function is called from code for every host, for example: ssb_bus_pcibus_register. This one seems to be called from ssb_pcihost_probe, however pcihost_wrapper is not module itself, it does not contains any devices table. This function seems to be registered with pci_register_driver from ssb_pcihost_register. That one gets called b43_pci_ssb_bridge_init. But damn, I don't remember anymore where I was 5 step ago. Not to mention whole code path. OK, I wrote all that to show you my confusion. I don't think asking any single questions will help understanding that. Is there any documentation I could read to get any basic understanding of ssb? P.S. Even one more thing: try to guess by function's name what can it be responsible for: "ssb_bus_ssbbus_register". It is used by some /arch/mips/bcm47xx/setup.c, but I can not image digging into next driver to understand whole architecture :| -- RafaÅ -- To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
