2011/2/9 George Kashperko <george@xxxxxxxxxxx>:
> From: George Kashperko <george@xxxxxxxxxxx>
>
> Major differences between AI/SB from drivers' perespective is control
> and state flags handling. These long term used to be TMSLOW/TMSHIGH ones
> and in order to be handled transparently should be masked under some
> indirect access handlers. This patch forces use of ssb_core_ctl_flags
> and ssb_core_state_flags introduced early. TMSLOW/TMSHIGH defines outside
> ssb code (b43, ssb gige and ohci drivers) were renamed to reflect actual
> meaning, flags' definitions moved to low two bytes. Common TMSLOW/TMSHIGH
> defines moved to ssb_private.h in order to limit their use by internal
> SB-specic code only.
> Signed-off-by: George Kashperko <george@xxxxxxxxxxx>
> ---
> Âdrivers/net/b44.c             Â|  Â2
> Âdrivers/net/wireless/b43/b43.h       |  32 ++++-----
> Âdrivers/net/wireless/b43/dma.c       |  Â4 -
> Âdrivers/net/wireless/b43/main.c      Â|  61 +++++++------------
> Âdrivers/net/wireless/b43/phy_g.c      |  Â2
> Âdrivers/net/wireless/b43/phy_n.c      |  18 +----
> Âdrivers/net/wireless/b43legacy/b43legacy.h | Â 20 +++---
> Âdrivers/net/wireless/b43legacy/dma.c    |  Â4 -
> Âdrivers/net/wireless/b43legacy/main.c   Â|  52 +++++-----------
> Âdrivers/net/wireless/b43legacy/phy.c    |  Â2
> Âdrivers/ssb/driver_gige.c         Â|  19 ++---
> Âdrivers/ssb/main.c             |  20 ++++--
> Âdrivers/ssb/ssb_private.h         Â|  24 +++++++
> Âdrivers/usb/host/ohci-ssb.c        Â|  Â4 -
> Âinclude/linux/ssb/ssb.h          Â|  Â4 -
> Âinclude/linux/ssb/ssb_driver_gige.h    Â|  12 +--
> Âinclude/linux/ssb/ssb_regs.h        |  42 ++++++-------
> Â17 files changed, 160 insertions(+), 162 deletions(-)
> --- linux-next-20110203.orig/drivers/net/b44.c Â2011-02-01 05:05:49.000000000 +0200
> +++ linux-next-20110203/drivers/net/b44.c    2011-02-08 12:17:03.000000000 +0200
> @@ -1568,7 +1568,7 @@ static void b44_setup_wol_pci(struct b44
> Â Â Â Âu16 val;
>
> Â Â Â Âif (bp->sdev->bus->bustype != SSB_BUSTYPE_SSB) {
> - Â Â Â Â Â Â Â bw32(bp, SSB_TMSLOW, br32(bp, SSB_TMSLOW) | SSB_TMSLOW_PE);
> + Â Â Â Â Â Â Â ssb_core_ctl_flags(bp->sdev, 0, SSB_CORECTL_PE, NULL);
> Â Â Â Â Â Â Â Âpci_read_config_word(bp->sdev->bus->host_pci, SSB_PMCSR, &val);
> Â Â Â Â Â Â Â Âpci_write_config_word(bp->sdev->bus->host_pci, SSB_PMCSR, val | SSB_PE);
> Â Â Â Â}
> --- linux-next-20110203.orig/drivers/net/wireless/b43/b43.h   2011-02-01 05:05:49.000000000 +0200
> +++ linux-next-20110203/drivers/net/wireless/b43/b43.h Â2011-02-08 12:17:03.000000000 +0200
> @@ -414,22 +414,22 @@ enum {
> Â#define B43_MACCMD_CCA Â Â Â Â Â Â Â Â 0x00000008 Â Â Â/* Clear channel assessment */
> Â#define B43_MACCMD_BGNOISE Â Â Â Â Â Â 0x00000010 Â Â Â/* Background noise */
>
> -/* 802.11 core specific TM State Low (SSB_TMSLOW) flags */
> -#define B43_TMSLOW_GMODE Â Â Â Â Â Â Â 0x20000000 Â Â Â/* G Mode Enable */
> -#define B43_TMSLOW_PHY_BANDWIDTH Â Â Â 0x00C00000 Â Â Â/* PHY band width and clock speed mask (N-PHY only) */
> -#define ÂB43_TMSLOW_PHY_BANDWIDTH_10MHZ Â Â Â Â0x00000000 Â Â Â/* 10 MHz bandwidth, 40 MHz PHY */
> -#define ÂB43_TMSLOW_PHY_BANDWIDTH_20MHZ Â Â Â Â0x00400000 Â Â Â/* 20 MHz bandwidth, 80 MHz PHY */
> -#define ÂB43_TMSLOW_PHY_BANDWIDTH_40MHZ Â Â Â Â0x00800000 Â Â Â/* 40 MHz bandwidth, 160 MHz PHY */
> -#define B43_TMSLOW_PLLREFSEL Â Â Â Â Â 0x00200000 Â Â Â/* PLL Frequency Reference Select (rev >= 5) */
> -#define B43_TMSLOW_MACPHYCLKEN Â Â Â Â 0x00100000 Â Â Â/* MAC PHY Clock Control Enable (rev >= 5) */
> -#define B43_TMSLOW_PHYRESET Â Â Â Â Â Â0x00080000 Â Â Â/* PHY Reset */
> -#define B43_TMSLOW_PHYCLKEN Â Â Â Â Â Â0x00040000 Â Â Â/* PHY Clock Enable */
> -
> -/* 802.11 core specific TM State High (SSB_TMSHIGH) flags */
> -#define B43_TMSHIGH_DUALBAND_PHY Â Â Â 0x00080000 Â Â Â/* Dualband PHY available */
> -#define B43_TMSHIGH_FCLOCK Â Â Â Â Â Â 0x00040000 Â Â Â/* Fast Clock Available (rev >= 5) */
> -#define B43_TMSHIGH_HAVE_5GHZ_PHY Â Â Â0x00020000 Â Â Â/* 5 GHz PHY available (rev >= 5) */
> -#define B43_TMSHIGH_HAVE_2GHZ_PHY Â Â Â0x00010000 Â Â Â/* 2.4 GHz PHY available (rev >= 5) */
> +/* 802.11 core specific control flags */
> +#define B43_CORECTL_GMODE Â Â Â Â Â Â Â Â Â Â Â0x2000 Â/* G Mode Enable */
> +#define B43_CORECTL_PHY_BANDWIDTH Â Â Â Â Â Â Â0x00C0 Â/* PHY band width and clock speed mask (N-PHY only) */
> +#define ÂB43_CORECTL_PHY_BANDWIDTH_10MHZ Â Â Â 0x0000 Â/* 10 MHz bandwidth, 40 MHz PHY */
> +#define ÂB43_CORECTL_PHY_BANDWIDTH_20MHZ Â Â Â 0x0040 Â/* 20 MHz bandwidth, 80 MHz PHY */
> +#define ÂB43_CORECTL_PHY_BANDWIDTH_40MHZ Â Â Â 0x0080 Â/* 40 MHz bandwidth, 160 MHz PHY */
> +#define B43_CORECTL_PLLREFSEL Â Â Â Â Â Â Â Â Â0x0020 Â/* PLL Frequency Reference Select (rev >= 5) */
> +#define B43_CORECTL_MACPHYCLKEN Â Â Â Â Â Â Â Â Â Â Â Â0x0010 Â/* MAC PHY Clock Control Enable (rev >= 5) */
> +#define B43_CORECTL_PHYRESET Â Â Â Â Â Â Â Â Â 0x0008 Â/* PHY Reset */
> +#define B43_CORECTL_PHYCLKEN Â Â Â Â Â Â Â Â Â 0x0004 Â/* PHY Clock Enable */
> +
> +/* 802.11 core specific state flags */
> +#define B43_CORESTAT_DUALBAND_PHY Â Â Â Â Â Â Â0x0008 Â/* Dualband PHY available */
> +#define B43_CORESTAT_FCLOCK Â Â Â Â Â Â Â Â Â Â0x0004 Â/* Fast Clock Available (rev >= 5) */
> +#define B43_CORESTAT_HAVE_5GHZ_PHY Â Â Â Â Â Â 0x0002 Â/* 5 GHz PHY available (rev >= 5) */
> +#define B43_CORESTAT_HAVE_2GHZ_PHY Â Â Â Â Â Â 0x0001 Â/* 2.4 GHz PHY available (rev >= 5) */
I don't know, I've doubts about it :/ That flags are quite messy, mask
for them is 0x3FFC0000. Ideally we should shift it by 14 bits, but
that would make writing code harder. Maaaaybe... Michael what do you
think about this?
> @@ -1213,6 +1214,9 @@ static void ssb_device_disable_sb(struct
> Â Â Â Âif (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
> Â Â Â Â Â Â Â Âreturn;
>
> + Â Â Â SSB_WARN_ON(core_specific_flags & 0xFFFF0000);
Make it ~0x00003FFC, value 0x1 is not valid flag.
Why don't you go ahead and make core flags u16?
--
RafaÅ
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