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Re: Regression in b43 with BCM4311/2

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Johannes,

I finally sorted this out. The patch in question (c7ab5ef) is the bad one, but
not the basic response rate part.

Going back to the code that worked, I discovered that the routines
b43_short_slot_timing_enable/disable() were never called. Once the new code
touched the shared memory location 0x0010, the transmit performance dropped way
off. If I let the new code adjust the Interframe Slot time in MMIO space, but
not the shared memory location, the transmit rate in my BCM4311/2 went from a
maximum of 18 to 22 Mb/s. This problem did not affect the 0x4315 device as the
memory was changed only for G PHYs. I think that should be for 2GHz, and have
made that adjustment. I have not yet tested that with the LP PHY. Once I do, I
will post a patch for comment and testing.

Thanks for helping me understand the basic response rates.

Larry
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