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Re: [PATCH 1/3] b43: N-PHY: add b43_nphy_rx_iq_est and b43_nphy_tx_iq_workaround

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On Tuesday 12 January 2010 20:38:07 Rafał Miłecki wrote:
>   struct nphy_txgains { u16 txgm[2]; u16 pga[2]; u16 pad[2]; u16 ipa[2]; };
> +struct nphy_iq_est { s32 iq0_prod; u32 i0_pwr; u32 q0_pwr; s32 iq1_prod;
> +			u32 i1_pwr; u32 q1_pwr; };

So it seems I didn't notice this earlier, but this violates kernel coding style.
Please do a separate patch that converts all structs from
struct foo { a; b; c; };
to
struct foo {
	a;
	b;
	c;
};

> +	if (wait)
> +		b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
> +	else
> +		b43_phy_mask(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);

Looks wrong to me.
Do you want this?

+	if (wait)
+		b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
+	else
+		b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);

> +/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
> +static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
> +{
> +	u16 array[4];
> +	int i;
> +
> +	b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
> +	for (i = 0; i < 4; i++)
> +		array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
> +
> +	b43_shm_write16(dev, B43_SHM_SHARED, 0x0700, array[0]);
> +	b43_shm_write16(dev, B43_SHM_SHARED, 0x0702, array[1]);
> +	b43_shm_write16(dev, B43_SHM_SHARED, 0x0704, array[2]);
> +	b43_shm_write16(dev, B43_SHM_SHARED, 0x0706, array[3]);

Do we have some names for the SHM locations?
If not, just do some defines.
#define B43_SHM_SH_NPHY_TXIQW0	0x0700
#define B43_SHM_SH_NPHY_TXIQW1	0x0702
...
in b43.h (next to the other SHM_SH defines)

-- 
Greetings, Michael.
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