2010/1/4 Luis R. Rodriguez <lrodriguez@xxxxxxxxxxx>: > > + > +/* FLASH(EEPROM) Defines for AR531X chips */ > +#define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */ > +#define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */ > +#define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0 > +#define AR5K_EEPROM_SIZE_UPPER_SHIFT 4 > +#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12 > + AR531X chips are SoCs, are you sure this comment is correct ? In the docs this marks the end of EAR section (and the end of checksum) for EEPROMs larger than 16k valid values for checksum end are 0x00000C0 to 0x0080000 Also to calculate EEPROM size (stored on the first 4 bits of 0x1c) you do this according to the docs 2 ^ (EEPROM size + 9) and valid values are from 1 to 11 (11 = 1MB) There is also an EEPROM size indicator on PCICFG but it seems it's only for older chips. A value of 0 on 0x1c means we have a 2k EEPROM and an end location 0x0000400. -- GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick -- To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
