This adds a compiletime assertion for a recently introduced
assumption on the slot counts.
The tx header cache handling code assumes that the TX slot count
can be divided evenly by the number of TX slots per frame.
Signed-off-by: Michael Buesch <mb@xxxxxxxxx>
---
Please queue on top of the DMA optimizations.
Index: wireless-testing/drivers/net/wireless/b43/dma.c
===================================================================
--- wireless-testing.orig/drivers/net/wireless/b43/dma.c 2009-02-19 23:34:25.000000000 +0100
+++ wireless-testing/drivers/net/wireless/b43/dma.c 2009-02-20 00:03:30.000000000 +0100
@@ -839,12 +839,16 @@ struct b43_dmaring *b43_setup_dmaring(st
spin_lock_init(&ring->lock);
#ifdef CONFIG_B43_DEBUG
ring->last_injected_overflow = jiffies;
#endif
if (for_tx) {
+ /* Assumption: B43_TXRING_SLOTS can be divided by TX_SLOTS_PER_FRAME */
+ BUILD_BUG_ON((B43_TXRING_SLOTS * 1000000) / TX_SLOTS_PER_FRAME !=
+ (B43_TXRING_SLOTS / TX_SLOTS_PER_FRAME) * 1000000);
+
ring->txhdr_cache = kcalloc(ring->nr_slots / TX_SLOTS_PER_FRAME,
b43_txhdr_size(dev),
GFP_KERNEL);
if (!ring->txhdr_cache)
goto err_kfree_meta;
--
Greetings, Michael.
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