Bitterblue Smith <rtl8821cerfe2@xxxxxxxxx> wrote:
>
> Create the new module rtl8192d-common and move some code into it from
> rtl8192de. Now the rtl8192de driver (PCI) and the new rtl8192du driver
> (USB) can share some of the code.
>
> This is mostly the code that required little effort to make it
> shareable. There are a few more functions which they could share, with
> more changes.
>
> Add phy_iq_calibrate member to struct rtl_hal_ops to allow moving the
> TX power tracking code from dm.c.
>
> The other changes in this patch are adjusting whitespace, renaming some
> functions, making some arrays const, and making checkpatch.pl less
> unhappy.
>
> rtl8192de is compile-tested only. rtl8192d-common is tested with the
> new rtl8192du driver.
>
> Signed-off-by: Bitterblue Smith <rtl8821cerfe2@xxxxxxxxx>
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/Kconfig
> b/drivers/net/wireless/realtek/rtlwifi/Kconfig
> index 9f6a4e35543c..2319eaa8845a 100644
> --- a/drivers/net/wireless/realtek/rtlwifi/Kconfig
> +++ b/drivers/net/wireless/realtek/rtlwifi/Kconfig
> @@ -37,6 +37,7 @@ config RTL8192SE
> config RTL8192DE
> tristate "Realtek RTL8192DE/RTL8188DE PCIe Wireless Network Adapter"
> depends on PCI
> + select RTL8192D_COMMON
> select RTLWIFI
> select RTLWIFI_PCI
> help
> @@ -142,6 +143,11 @@ config RTL8192C_COMMON
> depends on RTL8192CE || RTL8192CU
> default y
>
> +config RTL8192D_COMMON
> + tristate
> + depends on RTL8192DE
> + default y
> +
Existing RTL8723_COMMON also uses both 'depends on' and 'select', which are
mutual reference, so I think choosing only one of them would be better.
> config RTL8723_COMMON
> tristate
> depends on RTL8723AE || RTL8723BE
[...]
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.c
> @@ -0,0 +1,1079 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Copyright(c) 2009-2012 Realtek Corporation.*/
> +
> +#include "../wifi.h"
> +#include "../base.h"
> +#include "../core.h"
> +#include "reg.h"
> +#include "def.h"
> +#include "phy_common.h"
> +#include "dm_common.h"
> +
> +#define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
This definition can help nothing, just use entry_min_undec_sm_pwdb.
[...]
> +static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
> +{
> + static const u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
> + 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
> + 0x0a, 0x09, 0x08, 0x07, 0x06,
> + 0x05, 0x04, 0x04, 0x03, 0x02
> + };
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + u32 u4tmp;
> + int i;
> +
> + u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
> + rtlpriv->dm.thermalvalue_rxgain)]) << 12;
Necessary parenthesis around index_mapping[], and adding a local 'idx' variable
would be clear, like
idx = rtlpriv->efuse.eeprom_thermalmeter - rtlpriv->dm.thermalvalue_rxgain;
u4tmp = index_mapping[idx] << 12;
I know this kind of codes is existing for long time. Need your help to refine
them. Thanks in advance.
> +static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
> + bool *internal_pa, u8 thermalvalue, u8 delta,
> + u8 rf, struct rtl_efuse *rtlefuse,
> + struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
> + const u8 index_mapping[5][INDEX_MAPPING_NUM],
> + const u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
> +{
> + u8 offset = 0;
> + u8 index;
> + int i;
> +
> + for (i = 0; i < rf; i++) {
> + if (rtlhal->macphymode == DUALMAC_DUALPHY &&
> + rtlhal->interfaceindex == 1) /* MAC 1 5G */
> + *internal_pa = rtlefuse->internal_pa_5g[1];
> + else
> + *internal_pa = rtlefuse->internal_pa_5g[i];
Insert blank lines between these if-blocks.
> + if (*internal_pa) {
> + if (rtlhal->interfaceindex == 1 || i == rf)
> + offset = 4;
> + else
> + offset = 0;
> + if (rtlphy->current_channel >= 100 &&
> + rtlphy->current_channel <= 165)
> + offset += 2;
> + } else {
> + if (rtlhal->interfaceindex == 1 || i == rf)
> + offset = 2;
> + else
> + offset = 0;
> + }
> + if (thermalvalue > rtlefuse->eeprom_thermalmeter)
> + offset++;
> + if (*internal_pa) {
> + if (delta > INDEX_MAPPING_NUM - 1)
> + index = index_mapping_pa[offset]
> + [INDEX_MAPPING_NUM - 1];
> + else
> + index =
> + index_mapping_pa[offset][delta];
> + } else {
> + if (delta > INDEX_MAPPING_NUM - 1)
> + index =
> + index_mapping[offset][INDEX_MAPPING_NUM - 1];
> + else
> + index = index_mapping[offset][delta];
> + }
> + if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
> + if (*internal_pa && thermalvalue > 0x12) {
> + ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
> + ((delta / 2) * 3 + (delta % 2));
> + } else {
> + ofdm_index[i] -= index;
> + }
> + } else {
> + ofdm_index[i] += index;
> + }
> + }
> +}
> +
> +static void
> +rtl92d_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw *hw)
> +{
> + static const u8 index_mapping[5][INDEX_MAPPING_NUM] = {
> + /* 5G, path A/MAC 0, decrease power */
> + {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
Not sure why more than one spaces between "9" and "11". Just single one?
> + /* 5G, path A/MAC 0, increase power */
> + {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
> + /* 5G, path B/MAC 1, decrease power */
> + {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
> + /* 5G, path B/MAC 1, increase power */
> + {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
> + /* 2.4G, for decreas power */
> + {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
> + };
> + static const u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
> + /* 5G, path A/MAC 0, ch36-64, decrease power */
> + {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
> + /* 5G, path A/MAC 0, ch36-64, increase power */
> + {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
> + /* 5G, path A/MAC 0, ch100-165, decrease power */
> + {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
> + /* 5G, path A/MAC 0, ch100-165, increase power */
> + {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
> + /* 5G, path B/MAC 1, ch36-64, decrease power */
> + {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
> + /* 5G, path B/MAC 1, ch36-64, increase power */
> + {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
> + /* 5G, path B/MAC 1, ch100-165, decrease power */
> + {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
> + /* 5G, path B/MAC 1, ch100-165, increase power */
> + {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
> + };
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtlpriv);
> + struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
> + u8 offset, thermalvalue_avg_count = 0;
> + u32 thermalvalue_avg = 0;
> + bool internal_pa = false;
> + long ele_a = 0, ele_d, temp_cck, val_x, value32;
> + long val_y, ele_c = 0;
> + u8 ofdm_index[2];
> + s8 cck_index = 0;
> + u8 ofdm_index_old[2] = {0, 0};
> + s8 cck_index_old = 0;
> + u8 index;
> + int i;
> + bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
> + u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
In reverse X'mas tree.
> + u8 indexforchannel =
> + rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
Maybe, move initializer out of long statement.
> +
> + rtlpriv->dm.txpower_trackinginit = true;
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
> + thermalvalue = (u8)rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
> + thermalvalue,
> + rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
> +
> + if (!thermalvalue)
> + goto exit;
> +
> + if (is2t)
> + rf = 2;
> + else
> + rf = 1;
> +
> + if (rtlpriv->dm.thermalvalue && !rtlhal->reloadtxpowerindex)
> + goto old_index_done;
> +
> + ele_d = rtl_get_bbreg(hw, ROFDM0_XATXIQIMBALANCE, MASKDWORD) & MASKOFDM_D;
> + for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
> + if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
> + ofdm_index_old[0] = (u8)i;
> +
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
> + ROFDM0_XATXIQIMBALANCE,
> + ele_d, ofdm_index_old[0]);
> + break;
> + }
> + }
> + if (is2t) {
> + ele_d = rtl_get_bbreg(hw, ROFDM0_XBTXIQIMBALANCE,
> + MASKDWORD) & MASKOFDM_D;
> + for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
> + if (ele_d ==
> + (ofdmswing_table[i] & MASKOFDM_D)) {
Straighten into single line:
if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
> + ofdm_index_old[1] = (u8)i;
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING,
> + DBG_LOUD,
> + "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
> + ROFDM0_XBTXIQIMBALANCE, ele_d,
> + ofdm_index_old[1]);
> + break;
> + }
> + }
> + }
> + if (rtlhal->current_bandtype == BAND_ON_2_4G) {
> + rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
> + } else {
> + temp_cck = 0x090e1317;
> + cck_index_old = 12;
> + }
> +
> + if (!rtlpriv->dm.thermalvalue) {
> + rtlpriv->dm.thermalvalue = rtlefuse->eeprom_thermalmeter;
> + rtlpriv->dm.thermalvalue_lck = thermalvalue;
> + rtlpriv->dm.thermalvalue_iqk = thermalvalue;
> + rtlpriv->dm.thermalvalue_rxgain = rtlefuse->eeprom_thermalmeter;
> + for (i = 0; i < rf; i++)
> + rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
> + rtlpriv->dm.cck_index = cck_index_old;
> + }
> + if (rtlhal->reloadtxpowerindex) {
> + for (i = 0; i < rf; i++)
> + rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
> + rtlpriv->dm.cck_index = cck_index_old;
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "reload ofdm index for band switch\n");
> + }
> +old_index_done:
> + for (i = 0; i < rf; i++)
> + ofdm_index[i] = rtlpriv->dm.ofdm_index[i];
> +
> + rtlpriv->dm.thermalvalue_avg
> + [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
> + rtlpriv->dm.thermalvalue_avg_index++;
Could you please add proper blank lines for this function? Especially, right
after if-block and for-block.
> + if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
> + rtlpriv->dm.thermalvalue_avg_index = 0;
> + for (i = 0; i < AVG_THERMAL_NUM; i++) {
> + if (rtlpriv->dm.thermalvalue_avg[i]) {
> + thermalvalue_avg += rtlpriv->dm.thermalvalue_avg[i];
> + thermalvalue_avg_count++;
> + }
> + }
> + if (thermalvalue_avg_count)
> + thermalvalue = (u8)(thermalvalue_avg / thermalvalue_avg_count);
> + if (rtlhal->reloadtxpowerindex) {
> + delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
> + (thermalvalue - rtlefuse->eeprom_thermalmeter) :
> + (rtlefuse->eeprom_thermalmeter - thermalvalue);
> + rtlhal->reloadtxpowerindex = false;
> + rtlpriv->dm.done_txpower = false;
> + } else if (rtlpriv->dm.done_txpower) {
> + delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
> + (thermalvalue - rtlpriv->dm.thermalvalue) :
> + (rtlpriv->dm.thermalvalue - thermalvalue);
> + } else {
> + delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
> + (thermalvalue - rtlefuse->eeprom_thermalmeter) :
> + (rtlefuse->eeprom_thermalmeter - thermalvalue);
> + }
> + delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
> + (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
> + (rtlpriv->dm.thermalvalue_lck - thermalvalue);
> + delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
> + (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
> + (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
> + delta_rxgain =
> + (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
> + (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
> + (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x
> delta_lck 0x%x delta_iqk 0x%x\n",
> + thermalvalue, rtlpriv->dm.thermalvalue,
> + rtlefuse->eeprom_thermalmeter, delta, delta_lck,
> + delta_iqk);
> + if (delta_lck > rtlefuse->delta_lck && rtlefuse->delta_lck != 0) {
> + rtlpriv->dm.thermalvalue_lck = thermalvalue;
> + rtlpriv->cfg->ops->phy_lc_calibrate(hw, is2t);
> + }
> +
> + if (delta == 0 || !rtlpriv->dm.txpower_track_control)
> + goto check_delta;
> +
> + rtlpriv->dm.done_txpower = true;
> + delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
> + (thermalvalue - rtlefuse->eeprom_thermalmeter) :
> + (rtlefuse->eeprom_thermalmeter - thermalvalue);
> + if (rtlhal->current_bandtype == BAND_ON_2_4G) {
> + offset = 4;
> + if (delta > INDEX_MAPPING_NUM - 1)
> + index = index_mapping[offset][INDEX_MAPPING_NUM - 1];
> + else
> + index = index_mapping[offset][delta];
> + if (thermalvalue > rtlpriv->dm.thermalvalue) {
> + for (i = 0; i < rf; i++)
> + ofdm_index[i] -= delta;
> + cck_index -= delta;
> + } else {
> + for (i = 0; i < rf; i++)
> + ofdm_index[i] += index;
> + cck_index += index;
> + }
> + } else if (rtlhal->current_bandtype == BAND_ON_5G) {
> + rtl92d_bandtype_5G(rtlhal, ofdm_index,
> + &internal_pa, thermalvalue,
> + delta, rf, rtlefuse, rtlpriv,
> + rtlphy, index_mapping,
> + index_mapping_internal_pa);
> + }
> + if (is2t) {
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
> + rtlpriv->dm.ofdm_index[0],
> + rtlpriv->dm.ofdm_index[1],
> + rtlpriv->dm.cck_index);
> + } else {
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
> + rtlpriv->dm.ofdm_index[0],
> + rtlpriv->dm.cck_index);
> + }
> + for (i = 0; i < rf; i++) {
> + if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1) {
> + ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
> + } else if (internal_pa ||
> + rtlhal->current_bandtype == BAND_ON_2_4G) {
> + if (ofdm_index[i] < ofdm_min_index_internal_pa)
> + ofdm_index[i] = ofdm_min_index_internal_pa;
> + } else if (ofdm_index[i] < ofdm_min_index) {
> + ofdm_index[i] = ofdm_min_index;
> + }
> + }
> + if (rtlhal->current_bandtype == BAND_ON_2_4G) {
> + if (cck_index > CCK_TABLE_SIZE - 1)
> + cck_index = CCK_TABLE_SIZE - 1;
> + else if (cck_index < 0)
> + cck_index = 0;
> + }
> + if (is2t) {
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
> + ofdm_index[0], ofdm_index[1],
> + cck_index);
> + } else {
> + rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
> + "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
> + ofdm_index[0], cck_index);
> + }
> + ele_d = (ofdmswing_table[ofdm_index[0]] & 0xFFC00000) >> 22;
> + val_x = rtlphy->iqk_matrix[indexforchannel].value[0][0];
> + val_y = rtlphy->iqk_matrix[indexforchannel].value[0][1];
> + if (val_x != 0) {
> + if ((val_x & 0x00000200) != 0)
> + val_x = val_x | 0xFFFFFC00;
> + ele_a = ((val_x * ele_d) >> 8) & 0x000003FF;
> +
> + /* new element C = element D x Y */
> + if ((val_y & 0x00000200) != 0)
> + val_y = val_y | 0xFFFFFC00;
> + ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
> +
> + /* write new elements A, C, D to regC80 and
> + * regC94, element B is always 0
> + */
> + value32 = (ele_d << 22) | ((ele_c & 0x3F) << 16) | ele_a;
> + rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
> + MASKDWORD, value32);
> +
> + value32 = (ele_c & 0x000003C0) >> 6;
> + rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
> + value32);
> +
> + value32 = ((val_x * ele_d) >> 7) & 0x01;
> + rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
> + value32);
> +
> + } else {
> + rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE,
> + MASKDWORD,
> + ofdmswing_table[(u8)ofdm_index[0]]);
> + rtl_set_bbreg(hw, ROFDM0_XCTXAFE, MASKH4BITS,
> + 0x00);
> + rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
> + BIT(24), 0x00);
> + }
> +
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h
> new file mode 100644
> index 000000000000..9dc0df5bb068
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/dm_common.h
> @@ -0,0 +1,100 @@
[...]
> +struct swat {
> + u8 failure_cnt;
> + u8 try_flag;
> + u8 stop_trying;
> + long pre_rssi;
> + long trying_threshold;
> + u8 cur_antenna;
> + u8 pre_antenna;
> +};
Seemingly, no one uses this. Do I miss something?
> +
> +enum tag_dynamic_init_gain_operation_type_definition {
> + DIG_TYPE_THRESH_HIGH = 0,
> + DIG_TYPE_THRESH_LOW = 1,
> + DIG_TYPE_BACKOFF = 2,
> + DIG_TYPE_RX_GAIN_MIN = 3,
> + DIG_TYPE_RX_GAIN_MAX = 4,
> + DIG_TYPE_ENABLE = 5,
> + DIG_TYPE_DISABLE = 6,
> + DIG_OP_TYPE_MAX
> +};
No consumer?
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c
> new file mode 100644
> index 000000000000..73cfa9ad78ae
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/fw_common.c
> @@ -0,0 +1,369 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/* Copyright(c) 2009-2012 Realtek Corporation.*/
> +
> +#include "../wifi.h"
> +#include "../pci.h"
> +#include "../base.h"
> +#include "../efuse.h"
> +#include "def.h"
> +#include "reg.h"
> +#include "fw_common.h"
> +
> +bool rtl92d_is_fw_downloaded(struct rtl_priv *rtlpriv)
> +{
> + return (rtl_read_dword(rtlpriv, REG_MCUFWDL) & MCUFWDL_RDY) ?
> + true : false;
return !!(rtl_read_dword(rtlpriv, REG_MCUFWDL) & MCUFWDL_RDY);
[...]
> +void rtl92d_firmware_selfreset(struct ieee80211_hw *hw)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + u8 u1b_tmp;
> + u8 delay = 100;
> +
> + /* Set (REG_HMETFR + 3) to 0x20 is reset 8051 */
> + rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
> + u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
Add proper blank lines.
> + while (u1b_tmp & BIT(2)) {
> + delay--;
> + if (delay == 0)
> + break;
> + udelay(50);
> + u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
> + }
> + WARN_ONCE((delay <= 0), "rtl8192de: 8051 reset failed!\n");
> + rtl_dbg(rtlpriv, COMP_FW, DBG_DMESG,
> + "=====> 8051 reset success (%d)\n", delay);
> +}
> +EXPORT_SYMBOL_GPL(rtl92d_firmware_selfreset);
> +
[...]
> +static void _rtl92d_fill_h2c_command(struct ieee80211_hw *hw,
> + u8 element_id, u32 cmd_len, u8 *cmdbuffer)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
> + struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
> + u8 boxnum;
> + u16 box_reg = 0, box_extreg = 0;
> + u8 u1b_tmp;
> + bool isfw_read = false;
> + u8 buf_index = 0;
> + bool bwrite_success = false;
> + u8 wait_h2c_limmit = 100;
> + u8 wait_writeh2c_limmit = 100;
> + u8 boxcontent[4], boxextcontent[2];
> + u32 h2c_waitcounter = 0;
> + unsigned long flag;
> + u8 idx;
In reverse X'mas tree order
> +
> + if (ppsc->rfpwr_state == ERFOFF || ppsc->inactive_pwrstate == ERFOFF) {
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Return as RF is off!!!\n");
> + return;
> + }
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
> + while (true) {
> + spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
> + if (rtlhal->h2c_setinprogress) {
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "H2C set in progress! Wait to set..element_id(%d)\n",
> + element_id);
> +
> + while (rtlhal->h2c_setinprogress) {
> + spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
> + flag);
> + h2c_waitcounter++;
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Wait 100 us (%d times)...\n",
> + h2c_waitcounter);
> + udelay(100);
> +
> + if (h2c_waitcounter > 1000)
> + return;
> +
> + spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
> + flag);
> + }
> + spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
> + } else {
> + rtlhal->h2c_setinprogress = true;
> + spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
> + break;
> + }
> + }
> + while (!bwrite_success) {
> + wait_writeh2c_limmit--;
> + if (wait_writeh2c_limmit == 0) {
> + pr_err("Write H2C fail because no trigger for FW INT!\n");
> + break;
> + }
> + boxnum = rtlhal->last_hmeboxnum;
> + switch (boxnum) {
> + case 0:
> + box_reg = REG_HMEBOX_0;
> + box_extreg = REG_HMEBOX_EXT_0;
> + break;
> + case 1:
> + box_reg = REG_HMEBOX_1;
> + box_extreg = REG_HMEBOX_EXT_1;
> + break;
> + case 2:
> + box_reg = REG_HMEBOX_2;
> + box_extreg = REG_HMEBOX_EXT_2;
> + break;
> + case 3:
> + box_reg = REG_HMEBOX_3;
> + box_extreg = REG_HMEBOX_EXT_3;
> + break;
> + default:
> + pr_err("switch case %#x not processed\n",
> + boxnum);
> + break;
> + }
> + isfw_read = _rtl92d_check_fw_read_last_h2c(hw, boxnum);
> + while (!isfw_read) {
> + wait_h2c_limmit--;
> + if (wait_h2c_limmit == 0) {
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Waiting too long for FW read clear HMEBox(%d)!\n",
> + boxnum);
> + break;
> + }
> + udelay(10);
> + isfw_read = _rtl92d_check_fw_read_last_h2c(hw, boxnum);
> + u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Waiting for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n",
> + boxnum, u1b_tmp);
> + }
> + if (!isfw_read) {
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
> + boxnum);
> + break;
> + }
> + memset(boxcontent, 0, sizeof(boxcontent));
> + memset(boxextcontent, 0, sizeof(boxextcontent));
> + boxcontent[0] = element_id;
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "Write element_id box_reg(%4x) = %2x\n",
> + box_reg, element_id);
> + switch (cmd_len) {
> + case 1:
> + boxcontent[0] &= ~(BIT(7));
> + memcpy(boxcontent + 1, cmdbuffer + buf_index, 1);
> + for (idx = 0; idx < 4; idx++)
> + rtl_write_byte(rtlpriv, box_reg + idx,
> + boxcontent[idx]);
These switch...case seem to want to share for-loop from idx=0~3, so it did copy
to common buffer above. However, it did share nothing. Really want some
improvement here.
> + break;
> + case 2:
> + boxcontent[0] &= ~(BIT(7));
> + memcpy(boxcontent + 1, cmdbuffer + buf_index, 2);
> + for (idx = 0; idx < 4; idx++)
> + rtl_write_byte(rtlpriv, box_reg + idx,
> + boxcontent[idx]);
> + break;
> + case 3:
> + boxcontent[0] &= ~(BIT(7));
> + memcpy(boxcontent + 1, cmdbuffer + buf_index, 3);
> + for (idx = 0; idx < 4; idx++)
> + rtl_write_byte(rtlpriv, box_reg + idx,
> + boxcontent[idx]);
> + break;
> + case 4:
> + boxcontent[0] |= (BIT(7));
> + memcpy(boxextcontent, cmdbuffer + buf_index, 2);
> + memcpy(boxcontent + 1, cmdbuffer + buf_index + 2, 2);
> + for (idx = 0; idx < 2; idx++)
> + rtl_write_byte(rtlpriv, box_extreg + idx,
> + boxextcontent[idx]);
> + for (idx = 0; idx < 4; idx++)
> + rtl_write_byte(rtlpriv, box_reg + idx,
> + boxcontent[idx]);
> + break;
> + case 5:
> + boxcontent[0] |= (BIT(7));
> + memcpy(boxextcontent, cmdbuffer + buf_index, 2);
> + memcpy(boxcontent + 1, cmdbuffer + buf_index + 2, 3);
> + for (idx = 0; idx < 2; idx++)
> + rtl_write_byte(rtlpriv, box_extreg + idx,
> + boxextcontent[idx]);
> + for (idx = 0; idx < 4; idx++)
> + rtl_write_byte(rtlpriv, box_reg + idx,
> + boxcontent[idx]);
> + break;
> + default:
> + pr_err("switch case %#x not processed\n",
> + cmd_len);
> + break;
> + }
> + bwrite_success = true;
> + rtlhal->last_hmeboxnum = boxnum + 1;
> + if (rtlhal->last_hmeboxnum == 4)
> + rtlhal->last_hmeboxnum = 0;
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD,
> + "pHalData->last_hmeboxnum = %d\n",
> + rtlhal->last_hmeboxnum);
> + }
> + spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
> + rtlhal->h2c_setinprogress = false;
> + spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
> + rtl_dbg(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
> +}
> +
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c
> new file mode 100644
> index 000000000000..e70e83252e16
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/hw_common.c
> @@ -0,0 +1,1191 @@
[...]
> +static void _rtl92de_read_adapter_info(struct ieee80211_hw *hw)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
> + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
> + int params[] = {RTL8190_EEPROM_ID, EEPROM_VID, EEPROM_DID,
> + EEPROM_SVID, EEPROM_SMID, EEPROM_MAC_ADDR_MAC0_92D,
> + EEPROM_CHANNEL_PLAN, EEPROM_VERSION, EEPROM_CUSTOMER_ID,
> + COUNTRY_CODE_WORLD_WIDE_13};
static const.
But seemingly you change it by latter patch.
[...]
> +
> +static void rtl92de_update_hal_rate_table(struct ieee80211_hw *hw,
> + struct ieee80211_sta *sta)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
> + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
> + u32 ratr_value;
> + u8 ratr_index = 0;
> + u8 nmode = mac->ht_enable;
> + u8 mimo_ps = IEEE80211_SMPS_OFF;
> + u16 shortgi_rate;
> + u32 tmp_ratr_value;
> + u8 curtxbw_40mhz = mac->bw_40;
> + u8 curshortgi_40mhz = (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
> + 1 : 0;
> + u8 curshortgi_20mhz = (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ?
> + 1 : 0;
> + enum wireless_mode wirelessmode = mac->mode;
in reverse X'mas tree order.
> +static void rtl92de_update_hal_rate_mask(struct ieee80211_hw *hw,
> + struct ieee80211_sta *sta,
> + u8 rssi_level, bool update_bw)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
> + struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
> + struct rtl_sta_info *sta_entry = NULL;
> + u32 ratr_bitmap;
> + u8 ratr_index;
> + u8 curtxbw_40mhz = (sta->deflink.bandwidth >= IEEE80211_STA_RX_BW_40) ? 1 : 0;
> + u8 curshortgi_40mhz = (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
> + 1 : 0;
> + u8 curshortgi_20mhz = (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) ?
> + 1 : 0;
> + enum wireless_mode wirelessmode = 0;
> + bool shortgi = false;
> + u32 value[2];
> + u8 macid = 0;
> + u8 mimo_ps = IEEE80211_SMPS_OFF;
in reverse X'mas tree order.
> +void rtl92de_set_key(struct ieee80211_hw *hw, u32 key_index,
> + u8 *p_macaddr, bool is_group, u8 enc_algo,
> + bool is_wepkey, bool clear_all)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
> + const u8 *macaddr = p_macaddr;
> + u32 entry_id;
> + bool is_pairwise = false;
> + static const u8 cam_const_addr[4][6] = {
> + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
> + {0x00, 0x00, 0x00, 0x00, 0x00, 0x01},
> + {0x00, 0x00, 0x00, 0x00, 0x00, 0x02},
> + {0x00, 0x00, 0x00, 0x00, 0x00, 0x03}
> + };
> + static const u8 cam_const_broad[] = {
> + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
> + };
I prefer moving array of 'static const' to be first declaration of this function.
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c
> new file mode 100644
> index 000000000000..87c458b27f4f
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/phy_common.c
> @@ -0,0 +1,846 @@
[...]
> +static u32 _rtl92d_phy_rf_serial_read(struct ieee80211_hw *hw,
> + enum radio_path rfpath, u32 offset)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath];
> + u32 newoffset;
> + u32 tmplong, tmplong2;
> + u8 rfpi_enable = 0;
> + u32 retvalue;
> +
> + newoffset = offset;
> + tmplong = rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD);
> + if (rfpath == RF90_PATH_A)
> + tmplong2 = tmplong;
> + else
> + tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD);
> + tmplong2 = (tmplong2 & (~BLSSIREADADDRESS)) |
> + (newoffset << 23) | BLSSIREADEDGE;
> + rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
> + tmplong & (~BLSSIREADEDGE));
> + udelay(10);
> + rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
> + udelay(50);
> + udelay(50);
udelay(100); ?
[..]
> +void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> +
> + rtlphy->default_initialgain[0] =
> + (u8)rtl_get_bbreg(hw, ROFDM0_XAAGCCORE1, MASKBYTE0);
> + rtlphy->default_initialgain[1] =
> + (u8)rtl_get_bbreg(hw, ROFDM0_XBAGCCORE1, MASKBYTE0);
> + rtlphy->default_initialgain[2] =
> + (u8)rtl_get_bbreg(hw, ROFDM0_XCAGCCORE1, MASKBYTE0);
> + rtlphy->default_initialgain[3] =
> + (u8)rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
I think these 'u8' casting affect nothing. Remove them?
[...]
> +
> +static void _rtl92d_get_txpower_index(struct ieee80211_hw *hw, u8 channel,
> + u8 *cckpowerlevel, u8 *ofdmpowerlevel)
> +{
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + struct rtl_hal *rtlhal = &rtlpriv->rtlhal;
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
> + u8 index = (channel - 1);
No need parenthesis.
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c
> new file mode 100644
> index 000000000000..8af166183688
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/rf_common.c
> @@ -0,0 +1,353 @@
[...]
> +static void _rtl92d_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
> + u8 channel, u8 index,
> + u32 *powerbase0,
> + u32 *powerbase1,
> + u32 *p_outwriteval)
> +{
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
> + struct rtl_priv *rtlpriv = rtl_priv(hw);
> + struct rtl_phy *rtlphy = &rtlpriv->phy;
> + u8 i, chnlgroup = 0, pwr_diff_limit[4];
> + u32 writeval = 0, customer_limit, rf;
> +
> + for (rf = 0; rf < 2; rf++) {
> + switch (rtlefuse->eeprom_regulatory) {
> + case 0:
> + chnlgroup = 0;
> + writeval = rtlphy->mcs_offset
> + [chnlgroup][index +
> + (rf ? 8 : 0)] + ((index < 2) ?
> + powerbase0[rf] :
> + powerbase1[rf]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "RTK better performance, writeval(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B', writeval);
> + break;
> + case 1:
> + if (rtlphy->pwrgroup_cnt == 1)
> + chnlgroup = 0;
> + if (rtlphy->pwrgroup_cnt >= MAX_PG_GROUP) {
To reduce indent,
if (rtlphy->pwrgroup_cnt < MAX_PG_GROUP)
break;
> + chnlgroup = rtl92d_phy_get_chnlgroup_bypg(channel - 1);
> + if (rtlphy->current_chan_bw ==
> + HT_CHANNEL_WIDTH_20)
straighten it
if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20)
> + chnlgroup++;
> + else
> + chnlgroup += 4;
> + writeval = rtlphy->mcs_offset
> + [chnlgroup][index +
> + (rf ? 8 : 0)] + ((index < 2) ?
> + powerbase0[rf] :
> + powerbase1[rf]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "Realtek regulatory, 20MHz, writeval(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B', writeval);
> + }
> + break;
> + case 2:
> + writeval = ((index < 2) ? powerbase0[rf] :
> + powerbase1[rf]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "Better regulatory, writeval(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B', writeval);
> + break;
> + case 3:
> + chnlgroup = 0;
> + if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "customer's limit, 40MHz rf(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B',
> + rtlefuse->pwrgroup_ht40[rf]
> + [channel - 1]);
> + } else {
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "customer's limit, 20MHz rf(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B',
> + rtlefuse->pwrgroup_ht20[rf]
> + [channel - 1]);
> + }
> + for (i = 0; i < 4; i++) {
> + pwr_diff_limit[i] = (u8)((rtlphy->mcs_offset
> + [chnlgroup][index + (rf ? 8 : 0)] &
> + (0x7f << (i * 8))) >> (i * 8));
> + if (rtlphy->current_chan_bw ==
> + HT_CHANNEL_WIDTH_20_40) {
> + if (pwr_diff_limit[i] >
> + rtlefuse->pwrgroup_ht40[rf]
> + [channel - 1])
> + pwr_diff_limit[i] =
> + rtlefuse->pwrgroup_ht40
> + [rf][channel - 1];
This part is very hard to read...
> + } else {
> + if (pwr_diff_limit[i] >
> + rtlefuse->pwrgroup_ht20[rf][channel - 1])
> + pwr_diff_limit[i] =
> + rtlefuse->pwrgroup_ht20[rf]
> + [channel - 1];
> + }
> + }
> + customer_limit = (pwr_diff_limit[3] << 24) |
> + (pwr_diff_limit[2] << 16) |
> + (pwr_diff_limit[1] << 8) |
> + (pwr_diff_limit[0]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "Customer's limit rf(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B', customer_limit);
> + writeval = customer_limit + ((index < 2) ?
> + powerbase0[rf] : powerbase1[rf]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "Customer, writeval rf(%c)= 0x%x\n",
> + rf == 0 ? 'A' : 'B', writeval);
> + break;
> + default:
> + chnlgroup = 0;
> + writeval = rtlphy->mcs_offset[chnlgroup][index +
> + (rf ? 8 : 0)] + ((index < 2) ?
> + powerbase0[rf] : powerbase1[rf]);
> + RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
> + "RTK better performance, writeval rf(%c) = 0x%x\n",
> + rf == 0 ? 'A' : 'B', writeval);
> + break;
> + }
> + *(p_outwriteval + rf) = writeval;
> + }
> +}
> +
[...]
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c
> new file mode 100644
> index 000000000000..293616b66069
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.c
> @@ -0,0 +1,515 @@
[...]
> +static void _rtl92de_translate_rx_signal_stuff(struct ieee80211_hw *hw,
> + struct sk_buff *skb,
> + struct rtl_stats *pstats,
> + struct rx_desc_92d *pdesc,
> + struct rx_fwinfo_92d *p_drvinfo)
> +{
> + struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
> + struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
> + struct ieee80211_hdr *hdr;
> + u8 *tmp_buf;
> + u8 *praddr;
> + u16 type, cfc;
> + __le16 fc;
> + bool packet_matchbssid, packet_toself, packet_beacon = false;
in reverse X'mas tree order
> diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h
> b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h
> new file mode 100644
> index 000000000000..467e285280dc
> --- /dev/null
> +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192d/trx_common.h
[...]
> +struct rx_fwinfo_92d {
> + u8 gain_trsw[4];
> + u8 pwdb_all;
> + u8 cfosho[4];
> + u8 cfotail[4];
> + s8 rxevm[2];
> + s8 rxsnr[4];
> + u8 pdsnr[2];
> + u8 csi_current[2];
> + u8 csi_target[2];
> + u8 sigevm;
> + u8 max_ex_pwr;
> + u8 ex_intf_flag:1;
> + u8 sgi_en:1;
> + u8 rxsc:2;
> + u8 reserve:4;
> +} __packed;
> +
> +struct rx_desc_92d {
> + u32 length:14;
> + u32 crc32:1;
> + u32 icverror:1;
> + u32 drv_infosize:4;
> + u32 security:3;
> + u32 qos:1;
> + u32 shift:2;
> + u32 phystatus:1;
> + u32 swdec:1;
> + u32 lastseg:1;
> + u32 firstseg:1;
> + u32 eor:1;
> + u32 own:1;
> +
> + u32 macid:5;
> + u32 tid:4;
> + u32 hwrsvd:5;
> + u32 paggr:1;
> + u32 faggr:1;
> + u32 a1_fit:4;
> + u32 a2_fit:4;
> + u32 pam:1;
> + u32 pwr:1;
> + u32 moredata:1;
> + u32 morefrag:1;
> + u32 type:2;
> + u32 mc:1;
> + u32 bc:1;
> +
> + u32 seq:12;
> + u32 frag:4;
> + u32 nextpktlen:14;
> + u32 nextind:1;
> + u32 rsvd:1;
> +
> + u32 rxmcs:6;
> + u32 rxht:1;
> + u32 amsdu:1;
> + u32 splcp:1;
> + u32 bandwidth:1;
> + u32 htc:1;
> + u32 tcpchk_rpt:1;
> + u32 ipcchk_rpt:1;
> + u32 tcpchk_valid:1;
> + u32 hwpcerr:1;
> + u32 hwpcind:1;
> + u32 iv0:16;
> +
> + u32 iv1;
> +
> + u32 tsfl;
> +
> + u32 bufferaddress;
> + u32 bufferaddress64;
> +
> +} __packed;
These are not compatible to big-endian machine.
[...]
After going through this patch again, I really want you (or someone) can help
to refine this driver. The major problem is readability including
- should declare in reverse X'mas tree
- large function
- no proper blank lines
- unreadable indent to fit 80 characters limit of checkpatch
- ...
These problems are existing for a long time, and now may be a good time to
adjust some of them we are touching.
A way to adjust them is to add patches to convert above items I list
one by one. I can ignore flaws (not introduce by this patch though) in this
patch, and review coming patches (but still hope in the same patchset) that
fix these flaws. Since this patchset contains 14 patches already, maybe we
should have first patchset to adjust codes you will touch, and then add 8192DU
by second patchset.
Ping-Ke
