In ath11k_mhi_set_mhictrl_reset(), I observed on QCA6390/QCN9074/WCN6855, MHISTATUS has SYSERR bit always been set after SOC_GLOBAL_RESET. Signed-off-by: Kevin Lo <kevlo@xxxxxxxxx> --- diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c index 3de7fa6f88d0..1198e80d9dff 100644 --- a/drivers/net/wireless/ath/ath11k/mhi.c +++ b/drivers/net/wireless/ath/ath11k/mhi.c @@ -158,8 +158,8 @@ void ath11k_mhi_set_mhictrl_reset(struct ath11k_base *ab) ath11k_dbg(ab, ATH11K_DBG_PCI, "mhistatus 0x%x\n", val); - /* Observed on QCA6390 that after SOC_GLOBAL_RESET, MHISTATUS - * has SYSERR bit set and thus need to set MHICTRL_RESET + /* After SOC_GLOBAL_RESET, MHISTATUS has SYSERR bit + * always been set and thus need to set MHICTRL_RESET * to clear SYSERR. */ ath11k_pcic_write32(ab, MHICTRL, MHICTRL_RESET_MASK);