Hello, Good day to you!
I have a problem with one of my legacy patches
shared/arrisxi6/kernel-source/drivers/net/wireless/ath/ath10k/pmem.c:165:16:
error: 'PAGE_KERNEL_NOCACHE' undeclared (first use in this function);
did you mean 'PAGE_KERNEL_ROX'?
15:06:24 | 165 | VM_MAP, PAGE_KERNEL_NOCACHE)
After fixing the build issue, started seeing runtime issues.
2023 Mar 08 14:21:48.093818 kernel: ath10k_pci 0000:01:00.0: Failed
to get pcie state addr: -16
2023 Mar 08 14:21:48.094193 kernel: ath10k_pci 0000:01:00.0: failed
to setup init config: -16
2023 Mar 08 14:21:48.094535 kernel: ath10k_pci 0000:01:00.0: could
not power on hif bus (-16)
2023 Mar 08 14:21:48.094875 kernel: ath10k_pci 0000:01:00.0: could
not probe fw (-16)
When I checked the source of the problem, it is from the following lines of code
int ath10k_pci_init_config(struct ath10k *ar)
{
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
u32 interconnect_targ_addr;
u32 pcie_state_targ_addr = 0;
u32 pipe_cfg_targ_addr = 0;
u32 svc_to_pipe_map = 0;
u32 pcie_config_flags = 0;
u32 ealloc_value;
u32 ealloc_targ_addr;
u32 flag2_value;
u32 flag2_targ_addr;
int ret = 0;
/* Download to Target the CE Config and the service-to-CE map */
interconnect_targ_addr =
host_interest_item_address(HI_ITEM(hi_interconnect_state));
/* Supply Target-side CE configuration */
ret = ath10k_pci_diag_read32(ar, interconnect_targ_addr,
&pcie_state_targ_addr);
if (ret != 0) {
ath10k_err(ar, "Failed to get pcie state addr: %d\n", ret);
return ret;
}
Looks like ath10k_pci_diag_read32 may be limited to 32 bit
mode(please correct me if I am wrong).
1) Will this code work under 64 bit mode?
2)Does ath10k support 64 bit in general? Is there any documented
support for 64 bit in ath10k for QCA6174?
Thanks a lot for your responses
Sudeep R K
