On Thu, 2022-12-29 at 11:37 +0100, Martin Blumenstingl wrote:
> Hi Ping-Ke,
>
> On Thu, Dec 29, 2022 at 10:25 AM Ping-Ke Shih <pkshih@xxxxxxxxxxx> wrote:
> [...]
> > > @@ -43,13 +43,13 @@ struct rtw8821ce_efuse {
> > > u8 link_cap[4];
> > > u8 link_control[2];
> > > u8 serial_number[8];
> > > - u8 res0:2; /* 0xf4 */
> > > - u8 ltr_en:1;
> > > - u8 res1:2;
> > > - u8 obff:2;
> > > - u8 res2:3;
> > > - u8 obff_cap:2;
> > > - u8 res3:4;
> > > + u16 res0:2; /* 0xf4 */
> > > + u16 ltr_en:1;
> > > + u16 res1:2;
> > > + u16 obff:2;
> > > + u16 res2:3;
> > > + u16 obff_cap:2;
> > > + u16 res3:4;
> >
> > These should be __le16. Though bit fields are suitable to efuse layout,
> > we don't access these fields for now. It would be well.
> My understanding is that it should look like this (replacing all of res0..res3):
> __le16 some_field_name; /* 0xf4 */
> How to call that single __le16 field then?
You are right. Maybe, we can name it 'pcie_cap'.
But, we don't use them for now, so it is harmless to preserve them as is.
>
> I also tried using bit-fields for an __le16 (so basically the same as
> my patch but using __le16 instead of u16) but that makes sparse
> complain:
> error: invalid bitfield specifier for type restricted __le16
>
>
We can fix it by:
u8 res0:2; /* 0xf4 */
u8 ltr_en:1;
u8 res1:2;
u8 obff:2;
- u8 res2:3;
+ u8 res2_1:1;
+ u8 res2_2:2;
u8 obff_cap:2;
u8 res3:4;
I'm not sure why people merge bit fields res2_1:1 and res2_2:2 that
should be in different u8. I have confirmed this with internal data.
--
Ping-Ke
