Convert the Marvell NCI NFC controller to DT schema format. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> --- .../bindings/net/nfc/marvell,nci.yaml | 170 ++++++++++++++++++ .../devicetree/bindings/net/nfc/nfcmrvl.txt | 84 --------- 2 files changed, 170 insertions(+), 84 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml delete mode 100644 Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt diff --git a/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml new file mode 100644 index 000000000000..15a45db3899a --- /dev/null +++ b/Documentation/devicetree/bindings/net/nfc/marvell,nci.yaml @@ -0,0 +1,170 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nfc/marvell,nci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell International Ltd. NCI NFC controller + +maintainers: + - Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> + +properties: + compatible: + enum: + - marvell,nfc-i2c + - marvell,nfc-spi + - marvell,nfc-uart + + hci-muxed: + type: boolean + description: | + Specifies that the chip is muxing NCI over HCI frames + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + reset-n-io: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + maxItems: 1 + description: | + Output GPIO pin used to reset the chip (active low) + + i2c-int-falling: + type: boolean + description: | + For I2C type of connection. Specifies that the chip read event shall be + trigged on falling edge. + + i2c-int-rising: + type: boolean + description: | + For I2C type of connection. Specifies that the chip read event shall be + trigged on rising edge. + + break-control: + type: boolean + description: | + For UART type of connection. Specifies that the chip needs specific break + management. + + flow-control: + type: boolean + description: | + For UART type of connection. Specifies that the chip is using RTS/CTS. + + spi-cpha: true + spi-cpol: true + spi-max-frequency: true + +required: + - compatible + +allOf: + - if: + properties: + compatible: + contains: + const: marvell,nfc-i2c + then: + properties: + break-control: false + flow-control: false + spi-cpha: false + spi-cpol: false + spi-max-frequency: false + required: + - reg + + - if: + properties: + compatible: + contains: + const: marvell,nfc-spi + then: + properties: + break-control: false + flow-control: false + i2c-int-falling: false + i2c-int-rising: false + required: + - reg + + - if: + properties: + compatible: + contains: + const: marvell,nfc-uart + then: + properties: + i2c-int-falling: false + i2c-int-rising: false + interrupts: false + spi-cpha: false + spi-cpol: false + spi-max-frequency: false + reg: false + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + nfc@8 { + compatible = "marvell,nfc-i2c"; + reg = <0x8>; + + interrupt-parent = <&gpio3>; + interrupts = <21 IRQ_TYPE_EDGE_RISING>; + + i2c-int-rising; + + reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + spi { + #address-cells = <1>; + #size-cells = <0>; + + nfc@0 { + compatible = "marvell,nfc-spi"; + reg = <0>; + + spi-max-frequency = <3000000>; + spi-cpha; + spi-cpol; + + interrupt-parent = <&gpio1>; + interrupts = <17 IRQ_TYPE_EDGE_RISING>; + + reset-n-io = <&gpio3 19 GPIO_ACTIVE_HIGH>; + }; + }; + + - | + #include <dt-bindings/gpio/gpio.h> + + uart { + nfc { + compatible = "marvell,nfc-uart"; + + reset-n-io = <&gpio3 16 GPIO_ACTIVE_HIGH>; + + hci-muxed; + flow-control; + }; + }; diff --git a/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt b/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt deleted file mode 100644 index c9b35251bb20..000000000000 --- a/Documentation/devicetree/bindings/net/nfc/nfcmrvl.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Marvell International Ltd. NCI NFC Controller - -Required properties: -- compatible: Should be: - - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices - - "marvell,nfc-i2c" for I2C devices - - "marvell,nfc-spi" for SPI devices - -Optional SoC specific properties: -- pinctrl-names: Contains only one value - "default". -- pintctrl-0: Specifies the pin control groups used for this controller. -- reset-n-io: Output GPIO pin used to reset the chip (active low). -- hci-muxed: Specifies that the chip is muxing NCI over HCI frames. - -Optional UART-based chip specific properties: -- flow-control: Specifies that the chip is using RTS/CTS. -- break-control: Specifies that the chip needs specific break management. - -Optional I2C-based chip specific properties: -- i2c-int-falling: Specifies that the chip read event shall be trigged on - falling edge. -- i2c-int-rising: Specifies that the chip read event shall be trigged on - rising edge. - -Example (for ARM-based BeagleBoard Black with 88W8887 on UART5): - -&uart5 { - - nfcmrvluart: nfcmrvluart@5 { - compatible = "marvell,nfc-uart"; - - reset-n-io = <&gpio3 16 0>; - - hci-muxed; - flow-control; - } -}; - - -Example (for ARM-based BeagleBoard Black with 88W8887 on I2C1): - -&i2c1 { - clock-frequency = <400000>; - - nfcmrvli2c0: i2c@1 { - compatible = "marvell,nfc-i2c"; - - reg = <0x8>; - - /* I2C INT configuration */ - interrupt-parent = <&gpio3>; - interrupts = <21 0>; - - /* I2C INT trigger configuration */ - i2c-int-rising; - - /* Reset IO */ - reset-n-io = <&gpio3 19 0>; - }; -}; - - -Example (for ARM-based BeagleBoard Black on SPI0): - -&spi0 { - - mrvlnfcspi0: spi@0 { - compatible = "marvell,nfc-spi"; - - reg = <0>; - - /* SPI Bus configuration */ - spi-max-frequency = <3000000>; - spi-cpha; - spi-cpol; - - /* SPI INT configuration */ - interrupt-parent = <&gpio1>; - interrupts = <17 0>; - - /* Reset IO */ - reset-n-io = <&gpio3 19 0>; - }; -}; -- 2.30.2
