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[RFC v1 039/256] cl8k: add channel.h

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From: Viktor Barna <viktor.barna@xxxxxxxxxx>

(Part of the split. Please, take a look at the cover letter for more
details).

Signed-off-by: Viktor Barna <viktor.barna@xxxxxxxxxx>
---
 drivers/net/wireless/celeno/cl8k/channel.h | 187 +++++++++++++++++++++
 1 file changed, 187 insertions(+)
 create mode 100644 drivers/net/wireless/celeno/cl8k/channel.h

diff --git a/drivers/net/wireless/celeno/cl8k/channel.h b/drivers/net/wireless/celeno/cl8k/channel.h
new file mode 100644
index 000000000000..c31cb4f69f2a
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/channel.h
@@ -0,0 +1,187 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef CL_CHANNEL_H
+#define CL_CHANNEL_H
+
+#include <linux/types.h>
+#include <linux/errno.h>
+
+enum chan_idx_6g {
+       b6g_ch1,
+       b6g_ch2,
+       b6g_ch5,
+       b6g_ch9,
+       b6g_ch13,
+       b6g_ch17,
+       b6g_ch21,
+       b6g_ch25,
+       b6g_ch29,
+       b6g_ch33,
+       b6g_ch37,
+       b6g_ch41,
+       b6g_ch45,
+       b6g_ch49,
+       b6g_ch53,
+       b6g_ch57,
+       b6g_ch61,
+       b6g_ch65,
+       b6g_ch69,
+       b6g_ch73,
+       b6g_ch77,
+       b6g_ch81,
+       b6g_ch85,
+       b6g_ch89,
+       b6g_ch93,
+       b6g_ch97,
+       b6g_ch101,
+       b6g_ch105,
+       b6g_ch109,
+       b6g_ch113,
+       b6g_ch117,
+       b6g_ch121,
+       b6g_ch125,
+       b6g_ch129,
+       b6g_ch133,
+       b6g_ch137,
+       b6g_ch141,
+       b6g_ch145,
+       b6g_ch149,
+       b6g_ch153,
+       b6g_ch157,
+       b6g_ch161,
+       b6g_ch165,
+       b6g_ch169,
+       b6g_ch173,
+       b6g_ch177,
+       b6g_ch181,
+       b6g_ch185,
+       b6g_ch189,
+       b6g_ch193,
+       b6g_ch197,
+       b6g_ch201,
+       b6g_ch205,
+       b6g_ch209,
+       b6g_ch213,
+       b6g_ch217,
+       b6g_ch221,
+       b6g_ch225,
+       b6g_ch229,
+       b6g_ch233,
+
+       NUM_CHANNELS_6G
+};
+
+enum chan_idx_5g {
+       b5g_ch36,
+       b5g_ch38,
+       b5g_ch40,
+       b5g_ch42,
+       b5g_ch44,
+       b5g_ch46,
+       b5g_ch48,
+       b5g_ch50,
+       b5g_ch52,
+       b5g_ch54,
+       b5g_ch56,
+       b5g_ch58,
+       b5g_ch60,
+       b5g_ch62,
+       b5g_ch64,
+       b5g_ch100,
+       b5g_ch102,
+       b5g_ch104,
+       b5g_ch106,
+       b5g_ch108,
+       b5g_ch110,
+       b5g_ch112,
+       b5g_ch114,
+       b5g_ch116,
+       b5g_ch118,
+       b5g_ch120,
+       b5g_ch122,
+       b5g_ch124,
+       b5g_ch126,
+       b5g_ch128,
+       b5g_ch132,
+       b5g_ch134,
+       b5g_ch136,
+       b5g_ch138,
+       b5g_ch140,
+       b5g_ch142,
+       b5g_ch144,
+       b5g_ch149,
+       b5g_ch151,
+       b5g_ch153,
+       b5g_ch155,
+       b5g_ch157,
+       b5g_ch159,
+       b5g_ch161,
+       b5g_ch165,
+
+       NUM_CHANNELS_5G
+};
+
+enum chan_idx_24g {
+       b24g_ch1,
+       b24g_ch2,
+       b24g_ch3,
+       b24g_ch4,
+       b24g_ch5,
+       b24g_ch6,
+       b24g_ch7,
+       b24g_ch8,
+       b24g_ch9,
+       b24g_ch10,
+       b24g_ch11,
+       b24g_ch12,
+       b24g_ch13,
+       b24g_ch14,
+
+       NUM_CHANNELS_24G
+};
+
+enum cl_ch_status {
+       CH_STATUS_SUCCESS,
+       CH_STATUS_ALREADY_ON_CHANNEL,
+       CH_STATUS_INVALID_PARAM = -EINVAL,
+
+       CH_STATUS_MAX
+};
+
+/* 6g band has the largest list */
+#define MAX_CHANNELS NUM_CHANNELS_6G
+
+#define START_CHAN_IDX_6G 1
+
+/* 1 ==> 5955 */
+#define FREQ6G(_chan) ((_chan) == 2 ? 5935 : 5950 + 5 * (_chan))
+/* 36 ==> 5180 */
+#define FREQ5G(_chan) (5000 + 5 * (_chan))
+/* 1 ==> 2412 */
+#define FREQ2G(_chan) ((_chan) == 14 ? 2484 : 2407 + (_chan) *  5)
+
+/* 6G channels - UNII-5 */
+#define START_CHAN_IDX_UNII5 1
+#define END_CHAN_IDX_UNII5   85
+/* 6G channels - UNII-6 */
+#define START_CHAN_IDX_UNII6 89
+#define END_CHAN_IDX_UNII6   109
+/* 6G channels - UNII-7 */
+#define START_CHAN_IDX_UNII7 113
+#define END_CHAN_IDX_UNII7   165
+/* 6G channels - UNII-8 */
+#define START_CHAN_IDX_UNII8 169
+#define END_CHAN_IDX_UNII8   233
+
+#define INVALID_CHAN_IDX 0xff
+
+struct cl_hw;
+
+u8 cl_channel_to_index(struct cl_hw *cl_hw, u32 channel);
+u16 cl_channel_idx_to_freq(struct cl_hw *cl_hw, u8 index);
+bool cl_channel_is_valid(struct cl_hw *cl_hw, u8 channel);
+u32 cl_channel_num(struct cl_hw *cl_hw);
+bool __must_check cl_channel_is_scan_active(struct cl_hw *cl_hw);
+
+#endif /* CL_CHANNEL_H */
--
2.30.0

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