From: Viktor Barna <viktor.barna@xxxxxxxxxx>
(Part of the split. Please, take a look at the cover letter for more
details).
Signed-off-by: Viktor Barna <viktor.barna@xxxxxxxxxx>
---
drivers/net/wireless/celeno/cl8k/calib.h | 237 +++++++++++++++++++++++
1 file changed, 237 insertions(+)
create mode 100644 drivers/net/wireless/celeno/cl8k/calib.h
diff --git a/drivers/net/wireless/celeno/cl8k/calib.h b/drivers/net/wireless/celeno/cl8k/calib.h
new file mode 100644
index 000000000000..3282b8fc4efd
--- /dev/null
+++ b/drivers/net/wireless/celeno/cl8k/calib.h
@@ -0,0 +1,237 @@
+/* SPDX-License-Identifier: MIT */
+/* Copyright(c) 2019-2021, Celeno Communications Ltd. */
+
+#ifndef CL_CALIB_H
+#define CL_CALIB_H
+
+#include <net/cfg80211.h>
+
+#include "def.h"
+#include "vendor_cmd.h"
+
+#define UNCALIBRATED_POWER 15
+#define UNCALIBRATED_POWER_OFFSET 0
+#define UNCALIBRATED_TEMPERATURE 35
+
+#define DCOC_LNA_GAIN_NUM 8
+#define MAX_SX 2
+#define IQ_NUM_TONES_REQ 8
+#define IQ_NUM_TONES_CFM (2 * IQ_NUM_TONES_REQ)
+#define SINGLETONS_MAX_NUM 1
+#define LOOPS_MAX_NUM (2 + SINGLETONS_MAX_NUM) /* 1: pre,2-11:singletone,12:post */
+#define SX_FREQ_OFFSET_Q2 5
+
+/* Calibration constants */
+#define CALIB_RX_GAIN_DEFAULT 0x83
+#define CALIB_TX_GAIN_DEFAULT 0x75
+#define GAIN_SLEEVE_TRSHLD_DEFAULT 2
+#define CALIB_NCO_AMP_DEFAULT -10
+#define CALIB_NCO_FREQ_DEFAULT 16 /* 5M/312.5K */
+#define LO_P_THRESH 1000000
+#define N_SAMPLES_EXP_LOLC 13
+#define N_SAMPLES_EXP_IQC 13
+#define N_BIT_FIR_SCALE 11
+#define N_BIT_AMP_SCALE 10
+#define N_BIT_PHASE_SCALE 10
+#define GP_RAD_TRSHLD_DEFAULT 1144 /* Represents 1 degree in Q(16,16): 1*(pi/180) */
+#define GA_LIN_UPPER_TRSHLD_DEFAULT 66295 /* Represents 0.1 db in Q(16,16): 10^( 0.1/20)*2^16 */
+#define GA_LIN_LOWER_TRSHLD_DEFAULT 64786 /* Represents -0.1 db in Q(16,16): 10^(-0.1/20)*2^16 */
+#define COMP_FILTER_LEN_DEFAULT 9
+#define SINGLETONS_NUM_DEFAULT 10 /* Set to SINGLETONS_MAX_NUM for now*/
+#define RAMPUP_TIME 50
+#define LO_COARSE_STEP 20
+#define LO_FINE_STEP 1
+
+#define DCOC_MAX_VGA 0x14
+#define CALIB_RX_GAIN_UPPER_LIMIT 0x0
+#define CALIB_RX_GAIN_LOWER_LIMIT 0x14
+#define DCOC_MAX_VGA_ATHOS 0x1E
+#define CALIB_RX_GAIN_DEFAULT_ATHOS 0x8D
+#define CALIB_RX_GAIN_UPPER_LIMIT_ATHOS 0x0A
+#define CALIB_RX_GAIN_LOWER_LIMIT_ATHOS 0x14
+
+#define SET_PHY_DATA_FLAGS_NONE 0x0
+#define SET_PHY_DATA_FLAGS_DCOC 0x1 /* Set DCOC calibration data.*/
+#define SET_PHY_DATA_FLAGS_IQ_TX 0x2 /* Set IQ Tx calibration data.*/
+#define SET_PHY_DATA_FLAGS_IQ_RX 0x4 /* Set IQ Rx calibration data.*/
+#define SET_PHY_DATA_FLAGS_IQ_TX_LOLC 0x8 /* Set IQ Tx LOLC calibration data.*/
+#define SET_PHY_DATA_FLAGS_ALL ( \
+ SET_PHY_DATA_FLAGS_DCOC | \
+ SET_PHY_DATA_FLAGS_IQ_TX | \
+ SET_PHY_DATA_FLAGS_IQ_RX | \
+ SET_PHY_DATA_FLAGS_IQ_TX_LOLC)
+
+enum calib_cfm_id_type {
+ CALIB_CFM_DCOC,
+ CALIB_CFM_IQ,
+ CALIB_CFM_MAX
+};
+
+enum calib_channel_idx_24g {
+ CALIB_CHAN_24G_1,
+ CALIB_CHAN_24G_6,
+ CALIB_CHAN_24G_11,
+ CALIB_CHAN_24G_MAX,
+};
+
+enum calib_channel_idx_5g {
+ CALIB_CHAN_5G_36,
+ CALIB_CHAN_5G_52,
+ CALIB_CHAN_5G_100,
+ CALIB_CHAN_5G_116,
+ CALIB_CHAN_5G_132,
+ CALIB_CHAN_5G_149,
+ CALIB_CHAN_5G_MAX
+};
+
+enum calib_channel_idx_6g {
+ CALIB_CHAN_6G_1,
+ CALIB_CHAN_6G_17,
+ CALIB_CHAN_6G_33,
+ CALIB_CHAN_6G_49,
+ CALIB_CHAN_6G_65,
+ CALIB_CHAN_6G_81,
+ CALIB_CHAN_6G_97,
+ CALIB_CHAN_6G_113,
+ CALIB_CHAN_6G_129,
+ CALIB_CHAN_6G_145,
+ CALIB_CHAN_6G_161,
+ CALIB_CHAN_6G_177,
+ CALIB_CHAN_6G_193,
+ CALIB_CHAN_6G_209,
+ CALIB_CHAN_6G_225,
+ CALIB_CHAN_6G_MAX,
+};
+
+/* MAX(CALIB_CHAN_24G_MAX, CALIB_CHAN_5G_MAX, CALIB_CHAN_6G_MAX) */
+#define CALIB_CHAN_MAX CALIB_CHAN_6G_MAX
+
+struct cl_dcoc_calib {
+ s8 i;
+ s8 q;
+};
+
+struct cl_dcoc_report {
+ __le16 i_dc;
+ __le16 i_iterations;
+ __le16 q_dc;
+ __le16 q_iterations;
+};
+
+struct cl_iq_report {
+ u8 status;
+ s8 ir_db[LOOPS_MAX_NUM][IQ_NUM_TONES_CFM];
+ s8 ir_db_avg_post;
+};
+
+struct cl_iq_calib {
+ __le32 coef0;
+ __le32 coef1;
+ __le32 coef2;
+ __le32 gain;
+};
+
+struct cl_calib_errors {
+ u16 dcoc;
+ u16 lolc;
+ u16 iq_tx;
+ u16 iq_rx;
+};
+
+struct cl_calib_db {
+ struct cl_dcoc_calib
+ dcoc[TCV_MAX][CALIB_CHAN_MAX][CHNL_BW_MAX][MAX_SX][MAX_ANTENNAS][DCOC_LNA_GAIN_NUM];
+ u32 iq_tx_lolc[TCV_MAX][CALIB_CHAN_MAX][CHNL_BW_MAX][MAX_SX][MAX_ANTENNAS];
+ struct cl_iq_calib iq_tx[TCV_MAX][CALIB_CHAN_MAX][CHNL_BW_MAX][MAX_SX][MAX_ANTENNAS];
+ struct cl_iq_calib iq_rx[TCV_MAX][CALIB_CHAN_MAX][CHNL_BW_MAX][MAX_SX][MAX_ANTENNAS];
+ struct cl_calib_errors errors[TCV_MAX];
+ bool scan_complete;
+};
+
+
+struct cl_lolc_report {
+ u8 status;
+ u8 n_iter;
+ __le16 lolc_qual;
+};
+
+struct cl_gain_report {
+ u8 status;
+ u8 rx_gain;
+ u8 tx_gain;
+ u8 gain_quality;
+ __le16 final_p2p;
+ __le16 initial_p2p;
+};
+
+struct cl_iq_dcoc_info {
+ struct cl_dcoc_calib dcoc[DCOC_LNA_GAIN_NUM][MAX_ANTENNAS];
+ struct cl_iq_calib iq_tx[MAX_ANTENNAS];
+ __le32 iq_tx_lolc[MAX_ANTENNAS];
+ struct cl_iq_calib iq_rx[MAX_ANTENNAS];
+};
+
+struct cl_iq_dcoc_report {
+ struct cl_dcoc_report dcoc[DCOC_LNA_GAIN_NUM][MAX_ANTENNAS];
+ struct cl_gain_report gain_tx[MAX_ANTENNAS];
+ struct cl_gain_report gain_rx[MAX_ANTENNAS];
+ struct cl_lolc_report lolc_report[MAX_ANTENNAS];
+ struct cl_iq_report iq_tx[MAX_ANTENNAS];
+ struct cl_iq_report iq_rx[MAX_ANTENNAS];
+};
+
+struct calib_cfm {
+ u8 status;
+ __le16 raw_bits_data_0;
+ __le16 raw_bits_data_1;
+};
+
+struct cl_iq_dcoc_data {
+ struct cl_iq_dcoc_info iq_dcoc_db;
+ struct cl_iq_dcoc_report report;
+ struct calib_cfm dcoc_iq_cfm[CALIB_CFM_MAX];
+};
+
+struct cl_iq_dcoc_data_info {
+ struct cl_iq_dcoc_data *iq_dcoc_data;
+ u32 dma_addr;
+};
+
+struct cl_calib_restore {
+ u8 bw;
+ u32 primary;
+ u32 center;
+ u8 channel;
+};
+
+struct cl_hw;
+struct cl_calib_work {
+ struct work_struct ws;
+ struct cl_hw *cl_hw;
+};
+
+int cl_calib_get(struct wiphy *wiphy, struct wireless_dev *wdev,
+ const void *data, int data_len);
+int cl_calib_set(struct wiphy *wiphy, struct wireless_dev *wdev,
+ const void *data, int data_len);
+
+void cl_calib_power_read(struct cl_hw *cl_hw);
+void cl_calib_power_offset_fill(struct cl_hw *cl_hw, u8 channel,
+ u8 bw, u8 offset[MAX_ANTENNAS]);
+
+int cl_calib_pivot_channels_set(struct cl_hw *cl_hw, const void *chan_list, u32 size);
+int cl_calib_pivot_channels_reset(struct cl_hw *cl_hw);
+
+int cl_calib_start(struct cl_hw *cl_hw);
+void cl_calib_fill_phy_data(struct cl_hw *cl_hw, struct cl_iq_dcoc_info *iq_dcoc_db, u8 flags);
+int cl_calib_tables_alloc(struct cl_hw *cl_hw);
+void cl_calib_tables_free(struct cl_hw *cl_hw);
+bool cl_calib_is_needed(struct cl_hw *cl_hw, u8 channel, u8 bw);
+int cl_calib_set_channel(struct cl_hw *cl_hw, u8 channel, u8 bw, u32 primary, u32 center);
+void cl_calib_start_work(struct cl_hw *cl_hw);
+int cl_calib_handle_cfm(struct cl_hw *cl_hw, u8 mode);
+int cl_calib_validate_ants(struct cl_hw *cl_hw);
+void cl_calib_iq_get_tone_vector(u8 bw, u16 *tone_vector);
+int cl_calib_cli(struct cl_hw *cl_hw, struct cli_params *cli_params);
+
+#endif /* CL_CALIB_H */
--
2.30.0
________________________________
The information transmitted is intended only for the person or entity to which it is addressed and may contain confidential and/or privileged material. Any retransmission, dissemination, copying or other use of, or taking of any action in reliance upon this information is prohibited. If you received this in error, please contact the sender and delete the material from any computer. Nothing contained herein shall be deemed as a representation, warranty or a commitment by Celeno. No warranties are expressed or implied, including, but not limited to, any implied warranties of non-infringement, merchantability and fitness for a particular purpose.
________________________________
