On Sat, 2008-09-06 at 14:59 -0500, Larry Finger wrote: > In the V3 specs, I found > > "Transmit Status > > When this interrupt is set, the retrieve the TransmitStatus. Note that > on cores with revision < 5, the last DMA controller or PIO queue can > also also get the DMA recieve done interrupt, which also triggers the > TransmitStatus retrieval process. The driver should be prepared to > deal with both interrupts at any time, on any revision. In AP mode, > this interrupt also initiates the sending of powersave responses." Yeah, this isn't entirely correct, when the core revision is < 5 then the register-based TX status doesn't actually exist and the firmware always uses the FIFO-based mechanism. > The implication is that the interrupt will only be generated if we use > the last (i.e. #5) DMA controller. As we are only using #3, no > interrupts and handle_irq_status() is dead code. Right, only core revisions 2 and 4 are supported here. johannes
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