PMIC XO is the clock source for wifi rf clock in integrated wifi
chipset ex: WCN3990. Due to board layout errors XO frequency drifts
can cause wifi rf clock inaccuracy.
XO calibration test tree in Factory Test Mode is used to find the
best frequency offset(for example +/-2KHz )by programming XO trim
register. This ensure system clock stays within required 20 ppm
WLAN rf clock.
Retrieve the xo trim offset via system firmware (e.g., device tree),
especially in the case where the device doesn't have a useful EEPROM
on which to store the calibrated XO offset (e.g., for integrated Wifi).
Calibrated XO offset is sent to fw, which compensate the clock drift
by programing the XO trim register.
Testing:
Tested on QCS404 platform(WCN3990 HW)
Tested FW: WLAN.HL.3.1-00959-QCAHLSWMTPLZ-1
change since v1:
Added return check for case where xo cal dt is not populated.
Govind Singh (2):
dt: bindings: add dt entry for XO calibration support
ath10k: Add xo calibration support for wifi rf clock
.../devicetree/bindings/net/wireless/qcom,ath10k.txt | 1 +
drivers/net/wireless/ath/ath10k/qmi.c | 12 ++++++++++++
drivers/net/wireless/ath/ath10k/snoc.c | 11 +++++++++++
drivers/net/wireless/ath/ath10k/snoc.h | 2 ++
4 files changed, 26 insertions(+)
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