i have a idea what one cause could ne
+ nfval =
+ ath9k_hw_get_nf_limits(ah, chan)->cal[i];
+ if (nfval > -60 || nfval < -127)
+ nfval = default_nf;
this code here will allways return the default_nf since all possible returned values are within that range
and the || is likelly wrong too and must be replaced with &&. but the range itself looks bogus. can't be right
so please do me a favor and test your code against 9280 chipsets too and check if its working. right now its a full regression incidence
and should be reverted
Am 26.01.2018 um 12:07 schrieb Wojciech Dubowik:
Are you sure you have applied path 4 in the series. You should see
calibration piers. Sth like:
Calibration data
Chain 0
Freq ref volt temp nf_cal nf_pow rx_temp
2412 14 0 136 0 0 0
2437 13 0 136 0 0 0
2472 11 0 136 0 0 0
Chain 1
Freq ref volt temp nf_cal nf_pow rx_temp
2412 11 0 137 0 0 0
2437 11 0 139 0 0 0
2472 10 0 137 0 0 0
Chain 2
Freq ref volt temp nf_cal nf_pow rx_temp
2412 13 0 138 0 0 0
2437 14 0 139 0 0 0
2472 14 0 139 0 0 0
I have just done backports from ath.git and I can see these entries
with my Compex card.
Wojtek
On 26/01/18 11:36, Sebastian Gottschall wrote:
Am 26.01.2018 um 11:27 schrieb Wojciech Dubowik:
I will try it with again with couple of OEM cards.
this is no card. the eeprom is stored in flash memory. so the chip is
a 9280 pcie chip which is connected on board, but has no own flash
memory for calibration data. this is stored in system flash memory
Is nanostation calibrated for noisefloor? You can see it with
modal_eeprom in debugfs.
root@TRO2:/sys/kernel/debug/ieee80211/phy0/ath9k# cat modal_eeprom
2GHz modal Header :
Chain0 Ant. Control : 0
Chain1 Ant. Control : 0
Chain2 Ant. Control : 0
Ant. Common Control : 0
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 11
Chain1 TxRxAtten : 11
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 11
Chain1 RxTxMargin : 11
Chain2 RxTxMargin : 11
ADC Desired size : 224
PGA Desired size : 0
Chain0 xlna Gain : 14
Chain1 xlna Gain : 14
Chain2 xlna Gain : 14
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 0
Chain0 NF Threshold : 202
Chain1 NF Threshold : 202
Chain2 NF Threshold : 202
xpdGain : 9
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 2
Chain0 DriverBias : 2
xPA Bias Level : 0
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 2
Chain0 bswAtten : 21
Chain1 bswAtten : 21
Chain2 bswAtten : 0
Chain0 bswMargin : 31
Chain1 bswMargin : 31
Chain2 bswMargin : 0
HT40 Switch Settle : 44
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 2
Chain1 DriverBias : 2
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
5GHz modal Header :
Chain0 Ant. Control : 16
Chain1 Ant. Control : 16
Chain2 Ant. Control : 0
Ant. Common Control : 288
Chain0 Ant. Gain : 0
Chain1 Ant. Gain : 0
Chain2 Ant. Gain : 0
Switch Settle : 45
Chain0 TxRxAtten : 32
Chain1 TxRxAtten : 32
Chain2 TxRxAtten : 11
Chain0 RxTxMargin : 0
Chain1 RxTxMargin : 0
Chain2 RxTxMargin : 16
ADC Desired size : 226
PGA Desired size : 0
Chain0 xlna Gain : 13
Chain1 xlna Gain : 13
Chain2 xlna Gain : 13
txEndToXpaOff : 0
txEndToRxOn : 2
txFrameToXpaOn : 14
CCA Threshold) : 28
Chain0 NF Threshold : 255
Chain1 NF Threshold : 255
Chain2 NF Threshold : 255
xpdGain : 1
External PD : 1
Chain0 I Coefficient : 0
Chain1 I Coefficient : 0
Chain2 I Coefficient : 0
Chain0 Q Coefficient : 0
Chain1 Q Coefficient : 0
Chain2 Q Coefficient : 0
pdGainOverlap : 6
Chain0 OutputBias : 3
Chain0 DriverBias : 3
xPA Bias Level : 2
2chain pwr decrease : 0
3chain pwr decrease : 0
txFrameToDataStart : 14
txFrameToPaOn : 14
HT40 Power Inc. : 0
Chain0 bswAtten : 34
Chain1 bswAtten : 34
Chain2 bswAtten : 0
Chain0 bswMargin : 22
Chain1 bswMargin : 22
Chain2 bswMargin : 0
HT40 Switch Settle : 45
Chain0 xatten2Db : 0
Chain1 xatten2Db : 0
Chain2 xatten2Db : 0
Chain0 xatten2Margin : 0
Chain1 xatten2Margin : 0
Chain2 xatten2Margin : 0
Chain1 OutputBias : 3
Chain1 DriverBias : 3
LNA Control : 13
XPA Bias Freq0 : 0
XPA Bias Freq1 : 0
XPA Bias Freq2 : 0
Wojtek
On 26/01/18 10:59, Sebastian Gottschall wrote:
i dont know if this is a coincidence. but after testing your patch
on a standard ubiquiti nanostation m2 the noise floor looks wrong.
it will stay on -112 which is clearly impossible in 2.4 (before it
was around -96)
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