Search Linux Wireless

Re: [PATCH 03/11] ath10k_sdio: DMA bounce buffers for read write

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 12/25/2017 1:26 PM, Alagu Sankar wrote:
On 2017-12-22 21:38, Kalle Valo wrote:
silexcommon@xxxxxxxxx writes:

From: Alagu Sankar <alagusankar@xxxxxxxxxxxxxxx>

Some SD host controllers still need bounce buffers for SDIO data
transfers. While the transfers worked fine on x86 platforms,
this is found to be required for i.MX6 based systems.

Changes are similar to and derived from the ath6kl sdio driver.

Signed-off-by: Alagu Sankar <alagusankar@xxxxxxxxxxxxxxx>

Why is the bounce buffer needed exactly, what are the symptoms etc? To
me this sounds like an ugly workaround for a SDIO controller driver bug.

We faced problems with i.MX6. The authentication frame sent by the
driver never reached the air. The host driver accepted the buffer, but
did not send out the packet to the sdio module. No errors reported
anywhere, but the buffer is not accepted due to alignment. The same
driver however works fine without bounce buffer on x86 platform with
stdhci drivers. To make it compliant with all host controllers, we
introduced the bounce buffers, similar to what was done in ath6kl_sdio
drivers.

As mentioned by Adrian the comment from Kalle is that you are solving an issue caused by the sdio host controller. Although strictly speaking it may not be a driver bug, but a requirement of the host controller hardware. Either way it seems the obvious place to solve this is in the sdio host controller driver to which the issue applies. Or make it a generic quirk which can be enabled for sdio host controller drivers that need it. However, there may reasons to do it in the networking driver. For instance, the buffer you want to transfer might be the data buffer of an sk_buff you got from the networking stack and you want to have a zero-copy solution towards the wireless device.

Your solution checks for 4-byte alignment which is a requirement for ADMA as per SDIO spec. However, I have come across host controllers which have different alignment requirements. Also when CONFIG_ARCH_DMA_ADDR_T_64BIT is enabled the alignment changes from 4 to 8 bytes. So it seems you are solving a specific case you have come across, but you may want to design for more flexibility.

Hope this helps.

Regards,
Arend



[Index of Archives]     [Linux Host AP]     [ATH6KL]     [Linux Wireless Personal Area Network]     [Linux Bluetooth]     [Wireless Regulations]     [Linux Netdev]     [Kernel Newbies]     [Linux Kernel]     [IDE]     [Git]     [Netfilter]     [Bugtraq]     [Yosemite Hiking]     [MIPS Linux]     [ARM Linux]     [Linux RAID]

  Powered by Linux