On Sat, 2015-05-02 at 15:01 +0200, moorray3@xxxxx wrote:
> +int mt7601u_wait_asic_ready(struct mt7601u_dev *dev)
> +{
> + int i = 100;
> + u32 val;
> +
> + do {
> + val = mt7601u_rr(dev, MT_MAC_CSR0);
> + if (val && ~val)
> + return 0;
No delays here? Seems odd. You do have one in the next function where
you also call the _rr() function.
> + skb = alloc_skb(seg_len, GFP_ATOMIC);
> + if (!skb)
> + return NULL;
> +
> + memset(skb->cb, 0, sizeof(skb->cb));
Pretty sure that's pointless.
> + if (rxwi->rxinfo & cpu_to_le32(MT_RXINFO_L2PAD)) {
> + int hdr_len = ieee80211_get_hdrlen_from_buf(data, seg_len);
> +
> + memcpy(skb_put(skb, hdr_len), data, hdr_len);
> + data += hdr_len + 2;
> + seg_len -= hdr_len;
> + }
> +
> + memcpy(skb_put(skb, seg_len), data, seg_len);
> +
> + return skb;
Don't know how your buffers are set up, but if the DMA engine consumes
pages you could consider using paged RX instead of the memcpy().
johannes
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