On Tuesday 25 December 2012 20:45:59 Larry Finger wrote:
> >> +struct patch_info {
> >> + uint16_t prod_id;
> >> + uint16_t lmp_sub;
> >> + char *patch_name;
> >> + char *config_name;
> >> + uint8_t *fw_cache;
> >> + int fw_len;
> >> +};
> >> +
> >> +struct xchange_data {
> >> + struct dev_data *dev_entry;
> >> + int pipe_in, pipe_out;
> >> + uint8_t send_pkt[PKT_LEN];
> >> + uint8_t rcv_pkt[PKT_LEN];
> >
> > Violations of the DMA coherency rules, fails on non-x86
>
> I see that the buffers are not 64-bit aligned. What other conditions are necessary?
They need to be aligned on cache lines and nothing else may use
that cache line. The size of a cache line is specific to an architecture.
It is generally easiest for such buffers to be allocated separately with kmalloc().
> Thanks for the review. As suggested by you and Marcel, a complete rewrite is
> needed. I plan to use the mini-driver approach of Tedd Ho-Jeong An; however,
> your comments will be used when constructing that code.
Very good.
Regards
Oliver
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