> c) Enabling tx interrupts on primary interrupt mask register overrides > secondary mask registers. I set 0 on secondary mask register for all > queues (flags = 0) and i got tx interrupts if i set INT_TX on primary > imr. > Wrong, i did the test again, setting all simrs to 0, pimr does not override simrs (i don't get any tx interrupts on pisr if i set simrs to 0). Also i noticed that we handle TXURN interupt but we don't enable it... -- GPG ID: 0xD21DB2DB As you read this post global entropy rises. Have Fun ;-) Nick - To unsubscribe from this list: send the line "unsubscribe linux-wireless" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
