Re: [PATCH] watchdog: s3c2410_wdt: Fix PMU register bits for ExynosAutoV920 SoC

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On 2/12/25 16:41, Sangwook Shin wrote:
From: Kyunghwan Seo <khwan.seo@xxxxxxxxxxx>

Fix the PMU register bits for the ExynosAutoV920 SoC.
This SoC has different bit information compared to its previous
version, ExynosAutoV9, and we have made the necessary adjustments.

rst_stat_bit:
     - ExynosAutoV920 cl0 : 0
     - ExynosAutoV920 cl1 : 1

cnt_en_bit:
     - ExynosAutoV920 cl0 : 8
     - ExynosAutoV920 cl1 : 8

Signed-off-by: Kyunghwan Seo <khwan.seo@xxxxxxxxxxx>
Signed-off-by: Sangwook Shin <sw617.shin@xxxxxxxxxxx>

Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx>





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