> -----Original Message----- > From: Peter Griffin <peter.griffin@xxxxxxxxxx> > Sent: Monday, December 11, 2023 9:53 PM > To: robh+dt@xxxxxxxxxx; krzysztof.kozlowski+dt@xxxxxxxxxx; > mturquette@xxxxxxxxxxxx; conor+dt@xxxxxxxxxx; sboyd@xxxxxxxxxx; > tomasz.figa@xxxxxxxxx; s.nawrocki@xxxxxxxxxxx; linus.walleij@xxxxxxxxxx; > wim@xxxxxxxxxxxxxxxxxx; linux@xxxxxxxxxxxx; catalin.marinas@xxxxxxx; > will@xxxxxxxxxx; arnd@xxxxxxxx; olof@xxxxxxxxx; > gregkh@xxxxxxxxxxxxxxxxxxx; jirislaby@xxxxxxxxxx; > cw00.choi@xxxxxxxxxxx; alim.akhtar@xxxxxxxxxxx > Cc: peter.griffin@xxxxxxxxxx; tudor.ambarus@xxxxxxxxxx; > andre.draszik@xxxxxxxxxx; semen.protsenko@xxxxxxxxxx; > saravanak@xxxxxxxxxx; willmcvicker@xxxxxxxxxx; soc@xxxxxxxxxx; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux- > samsung-soc@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux- > gpio@xxxxxxxxxxxxxxx; linux-watchdog@xxxxxxxxxxxxxxx; kernel- > team@xxxxxxxxxxx; linux-serial@xxxxxxxxxxxxxxx > Subject: [PATCH v7 11/16] watchdog: s3c2410_wdt: Update QUIRK macros to > use BIT macro > > Update the remaining QUIRK macros to use the BIT macro. > Ah! I see you have change use BIT here, so you can squash this patch to patch 10/16 or Move BIT change from patch 10/16 to this patch. Either way is fine. > Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> > --- > drivers/watchdog/s3c2410_wdt.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/watchdog/s3c2410_wdt.c > b/drivers/watchdog/s3c2410_wdt.c index 7ecb762a371d..b7a03668f743 > 100644 > --- a/drivers/watchdog/s3c2410_wdt.c > +++ b/drivers/watchdog/s3c2410_wdt.c > @@ -107,11 +107,11 @@ > * DBGACK_MASK bit disables the watchdog outputs when the SoC is in > debug mode. > * Debug mode is determined by the DBGACK CPU signal. > */ > -#define QUIRK_HAS_WTCLRINT_REG (1 << 0) > -#define QUIRK_HAS_PMU_MASK_RESET (1 << 1) > -#define QUIRK_HAS_PMU_RST_STAT (1 << 2) > -#define QUIRK_HAS_PMU_AUTO_DISABLE (1 << 3) > -#define QUIRK_HAS_PMU_CNT_EN (1 << 4) > +#define QUIRK_HAS_WTCLRINT_REG BIT(0) > +#define QUIRK_HAS_PMU_MASK_RESET BIT(1) > +#define QUIRK_HAS_PMU_RST_STAT BIT(2) > +#define QUIRK_HAS_PMU_AUTO_DISABLE BIT(3) > +#define QUIRK_HAS_PMU_CNT_EN BIT(4) > #define QUIRK_HAS_DBGACK_BIT BIT(5) > > /* These quirks require that we have a PMU register map */ > -- > 2.43.0.472.g3155946c3a-goog
