On Thu, Oct 5, 2023 at 6:04 PM Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> wrote: > On 05/10/2023 17:55, Peter Griffin wrote: > > Add the gs101 SoC interrupt header that provides human readable > > constants for all the IRQs in the SoC. > > > > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> > > +#define ITNO IRQ_TYPE_NONE > > +#define ITER IRQ_TYPE_EDGE_RISING > > +#define ITEF IRQ_TYPE_EDGE_FALLING > > +#define ITEB IRQ_TYPE_EDGE_BOTH > > +#define ITLH IRQ_TYPE_LEVEL_HIGH > > +#define ITLL IRQ_TYPE_LEVEL_LOW > > No, these are not bindings. > > > + > > +#define IRQ_ALIVE_EINT0 0 > > +#define IRQ_ALIVE_EINT1 1 > > We do not keep interrupt numbers as bindings. Please drop entire file. Agree, but it should be fine to have as a SoC-specific .dtsi under arch/.../google/gs101-irq.dtsi though! Yours, Linus Walleij
