On Tue, 15 Aug 2023 at 16:40, Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
>
> On 15/08/2023 16:17, Robert Marko wrote:
> > Add the required DT node for WDT operation.
> >
> > Signed-off-by: Robert Marko <robimarko@xxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++
> > 1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > index 3285c86824cf..168322bfb11c 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
> > @@ -182,6 +182,13 @@ v2m1: v2m@1000 {
> > };
> > };
> >
> > + watchdog: watchdog@b017000 {
> > + compatible = "qcom,apss-wdt-ipq5018", "qcom,kpss-wdt";
> > + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
>
> I think all GIC_SPI interrupts are level high.
They are most probably using GIC-500 which supports rising edge or
active high interrupts.
Both the older GIC-400 and newer GIC-600 also support the same.
Vendor DTS indicates this level, IPQ8074 and IPQ6018 which use the
same core, and it
seems the same WDT IP use the rising edge IRQ.
>
> > + reg = <0x0b017000 0x40>;
>
> Keep the reg as second property.
Ok,
will do.
Regards,
Robert
>
> > + clocks = <&sleep_clk>;
> > + };
>
> Best regards,
> Krzysztof
>
