On Tue, Sep 20, 2022 at 09:27:21AM +0000, Vladimir Panteleev wrote: > Allow configuring the "action" bit, as documented in [1]. > > Previously, the only action supported by this module was to reset the > system (0). It can now be configured to power off (1) instead. > > [1]: https://www.amd.com/system/files/TechDocs/44413.pdf The referenced AMD document 44413 is over 10 years old, and I'm concerned when I try to line that document up against the newer versions that are implemented in AMD's EPYC processors, that the bit being manipulated as SP5100_WDT_ACTION_RESET is effectively reserved in the newer references, for example: https://www.amd.com/system/files/TechDocs/55772-A1-PUB.zip Is Core::X86::Msr::CpuWdtCfg in the newer document is the same as WatchDogControl in the cited 44413.pdf? If so, then I would point out that bit 2 is now included in what is called, CpuWdtTimeBase where values 2-3H are reserved, meaning bit 2 effectively must be zero. -- Randy Wright Hewlett Packard Enterprise Phone: (970) 898-0998 Mail: rwright@xxxxxxx
