On Fri, 29 Oct 2021 at 11:04, Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx> wrote: > > On 29/10/2021 02:16, Guenter Roeck wrote: > > On 10/28/21 11:35 AM, Sam Protsenko wrote: > >> Not all SoCs have AUTOMATIC_WDT_RESET_DISABLE register, examples are > >> Exynos850 and Exynos9. On such chips reset disable register shouldn't be > >> accessed. Provide a way to avoid handling that register. This is done by > >> introducing separate callbacks to driver data structure: one for reset > >> disable register, and one for mask reset register. Now those callbacks > >> can be checked and called only when those were set in driver data. > >> > >> This commit doesn't bring any functional change to existing devices, but > >> merely provides an infrastructure for upcoming chips support. > >> > > > > That doesn't explain why the callbacks are needed instead of additional > > feature flags. > > > > Or why not skipping the disable operations if disable_reg is not provided? > Yeah, that was my first thought too :) Then I figured disable_reg is offset, and 0x0 is a valid offset too. Anyway, I'll rework this patch using quirks, as discussed above. Will send v2 soon. > > Best regards, > Krzysztof
