On Mon, Mar 29, 2021 at 09:49:36PM +0530, Srinivas Neeli wrote: > From: Srinivas Goud <srinivas.goud@xxxxxxxxxx> > > Used BIT macro instead of mask value. > > Signed-off-by: Srinivas Goud <srinivas.goud@xxxxxxxxxx> > Signed-off-by: Michal Simek <michal.simek@xxxxxxxxxx> > Signed-off-by: Srinivas Neeli <srinivas.neeli@xxxxxxxxxx> Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx> > --- > Changes in V2: > -Included bits.h header file. > --- > drivers/watchdog/of_xilinx_wdt.c | 9 +++++---- > 1 file changed, 5 insertions(+), 4 deletions(-) > > diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c > index 00549164b3d7..f76ec56859a4 100644 > --- a/drivers/watchdog/of_xilinx_wdt.c > +++ b/drivers/watchdog/of_xilinx_wdt.c > @@ -6,6 +6,7 @@ > * (C) Copyright 2011 (Alejandro Cabrera <aldaya@xxxxxxxxx>) > */ > > +#include <linux/bits.h> > #include <linux/clk.h> > #include <linux/err.h> > #include <linux/module.h> > @@ -24,12 +25,12 @@ > #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */ > > /* Control/Status Register Masks */ > -#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */ > -#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */ > -#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */ > +#define XWT_CSR0_WRS_MASK BIT(3) /* Reset status */ > +#define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */ > +#define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */ > > /* Control/Status Register 0/1 bits */ > -#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */ > +#define XWT_CSRX_EWDT2_MASK BIT(0) /* Enable bit 2 */ > > /* SelfTest constants */ > #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000 > -- > 2.9.1 >
