Re: [PATCH 1/2] watchdog: Add support for Armada 37xx CPU watchdog

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> > > +static u64 get_counter_value(struct armada_37xx_watchdog *dev)
> > > +{
> > > +	u64 val;
> > > +
> > > +	val = readl(dev->reg + CNTR_COUNT_HIGH);
> > > +	val = (val << 32) | readl(dev->reg + CNTR_COUNT_LOW);    
> > 
> > Is this guaranteed to be consistent ? What happens if there is a
> > 32-bit wrap between those two operations ?  
> 
> hmmm. The address is not divisible by 8, so I can't use readq :( what
> do you propose?

What do you think of this solution?

u64 val;
u32 low1, low2;

low1 = readl(dev->reg + CNTR_COUNT_LOW);
val = readl(dev->reg + CNTR_COUNT_HIGH);
low2 = readl(dev->reg + CNTR_COUNT_LOW);

/*
 * If low jumped in this short time more than 2^31, a wrap probably
 * occured. Read high again.
 */
if (low2 - low1 > 0x80000000)
	val = readl(dev->reg + CNTR_COUNT_HIGH);
val = (val << 32) | low2;



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