Got it, thanks.
Regards
Bibo Mao
On 2024/10/22 下午5:45, Huacai Chen wrote:
On Tue, Oct 22, 2024 at 5:17 PM maobibo <maobibo@xxxxxxxxxxx> wrote:
Hi Huacai/Thomas,
Sorry for the ping message :(
Can this patch be applied int next RC version?
Queued for the next release.
Huacai
Regards
Bibo Mao
On 2024/10/2 下午9:42, Thomas Gleixner wrote:
On Wed, Sep 11 2024 at 17:11, Huacai Chen wrote:
Hi, Thomas,
On Fri, Aug 30, 2024 at 5:32 PM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
Interrupts can be routed to maximal four virtual CPUs with one HW
EIOINTC interrupt controller model, since interrupt routing is encoded with
CPU bitmap and EIOINTC node combined method. Here add the EIOINTC virt
extension support so that interrupts can be routed to 256 vCPUs on
hypervisor mode. CPU bitmap is replaced with normal encoding and EIOINTC
node type is removed, so there are 8 bits for cpu selection, at most 256
vCPUs are supported for interrupt routing.
This patch is OK for me now, but seems it depends on the first two,
and the first two will get upstream via loongarch-kvm tree. So is that
possible to also apply this one to loongarch-kvm with your Acked-by?
Go ahead.
Reviewed-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
